forked from andrius/gentoo-bootstrap
163 lines
6.3 KiB
Diff
163 lines
6.3 KiB
Diff
--- old/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp
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+++ new/src/hotspot/cpu/ppc/macroAssembler_ppc.cpp
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@@ -1294,7 +1294,11 @@
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// the safepoing polling page.
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ucontext_t* uc = (ucontext_t*) ucontext;
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// Set polling address.
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+#if defined(__GLIBC__) || defined(__UCLIBC__)
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address addr = (address)uc->uc_mcontext.regs->gpr[ra] + (ssize_t)ds;
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+#else // Musl
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+ address addr = (address)uc->uc_mcontext.gp_regs[ra] + (ssize_t) ds;
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+#endif
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if (polling_address_ptr != NULL) {
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*polling_address_ptr = addr;
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}
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@@ -1315,15 +1319,24 @@
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int rb = inv_rb_field(instruction);
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// look up content of ra and rb in ucontext
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+#if defined(__GLIBC__) || defined(__UCLIBC__)
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address ra_val=(address)uc->uc_mcontext.regs->gpr[ra];
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long rb_val=(long)uc->uc_mcontext.regs->gpr[rb];
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+#else // Musl
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+ address ra_val=(address)uc->uc_mcontext.gp_regs[ra];
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+ long rb_val=(long)uc->uc_mcontext.gp_regs[rb];
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+#endif
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return os::is_memory_serialize_page(thread, ra_val+rb_val);
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} else if (is_stw(instruction) || is_stwu(instruction)) {
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int ra = inv_ra_field(instruction);
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int d1 = inv_d1_field(instruction);
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// look up content of ra in ucontext
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+#if defined(__GLIBC__) || defined(__UCLIBC__)
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address ra_val=(address)uc->uc_mcontext.regs->gpr[ra];
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+#else // Musl
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+ address ra_val=(address)uc->uc_mcontext.gp_regs[ra];
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+#endif
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return os::is_memory_serialize_page(thread, ra_val+d1);
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} else {
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return false;
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@@ -1386,11 +1399,20 @@
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|| (is_stdu(instruction) && rs == 1)) {
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int ds = inv_ds_field(instruction);
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// return banged address
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+#if defined(__GLIBC__) || defined(__UCLIBC__)
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return ds+(address)uc->uc_mcontext.regs->gpr[ra];
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+#else // Musl
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+ return ds+(address)uc->uc_mcontext.gp_regs[ra];
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+#endif
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} else if (is_stdux(instruction) && rs == 1) {
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int rb = inv_rb_field(instruction);
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+#if defined(__GLIBC__) || defined(__UCLIBC__)
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address sp = (address)uc->uc_mcontext.regs->gpr[1];
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long rb_val = (long)uc->uc_mcontext.regs->gpr[rb];
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+#else // Musl
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+ address sp = (address)uc->uc_mcontext.gp_regs[1];
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+ long rb_val = (long)uc->uc_mcontext.gp_regs[rb];
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+#endif
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return ra != 1 || rb_val >= 0 ? NULL // not a stack bang
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: sp + rb_val; // banged address
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}
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--- old/src/hotspot/cpu/ppc/vm_version_ppc.cpp
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+++ new/src/hotspot/cpu/ppc/vm_version_ppc.cpp
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@@ -745,7 +745,7 @@
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unsigned long auxv = getauxval(AT_HWCAP2);
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if (auxv & PPC_FEATURE2_HTM_NOSC) {
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- if (auxv & PPC_FEATURE2_HAS_HTM) {
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+ if (auxv & PPC_FEATURE2_HTM) {
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// TM on POWER8 and POWER9 in compat mode (VM) is supported by the JVM.
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// TM on POWER9 DD2.1 NV (baremetal) is not supported by the JVM (TM on
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// POWER9 DD2.1 NV has a few issues that need a couple of firmware
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--- old/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp
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+++ new/src/hotspot/os_cpu/linux_ppc/os_linux_ppc.cpp
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@@ -109,20 +109,34 @@
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// - if uc was filled by getcontext(), it is undefined - getcontext() does not fill
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// it because the volatile registers are not needed to make setcontext() work.
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// Hopefully it was zero'd out beforehand.
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+#if defined(__GLIBC__) || defined(__UCLIBC__)
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guarantee(uc->uc_mcontext.regs != NULL, "only use ucontext_get_pc in sigaction context");
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return (address)uc->uc_mcontext.regs->nip;
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+#else // Musl
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+ guarantee(uc->uc_mcontext.gp_regs != NULL, "only use ucontext_get_pc in sigaction context");
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+ return (address)uc->uc_mcontext.gp_regs[32];
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+#endif
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}
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// modify PC in ucontext.
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// Note: Only use this for an ucontext handed down to a signal handler. See comment
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// in ucontext_get_pc.
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void os::Linux::ucontext_set_pc(ucontext_t * uc, address pc) {
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+#if defined(__GLIBC__) || defined(__UCLIBC__)
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guarantee(uc->uc_mcontext.regs != NULL, "only use ucontext_set_pc in sigaction context");
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uc->uc_mcontext.regs->nip = (unsigned long)pc;
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+#else // Musl
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+ guarantee(uc->uc_mcontext.gp_regs != NULL, "only use ucontext_set_pc in sigaction context");
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+ uc->uc_mcontext.gp_regs[32] = (unsigned long)pc;
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+#endif
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}
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intptr_t* os::Linux::ucontext_get_sp(const ucontext_t * uc) {
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+#if defined(__GLIBC__) || defined(__UCLIBC__)
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return (intptr_t*)uc->uc_mcontext.regs->gpr[1/*REG_SP*/];
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+#else // Musl
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+ return (intptr_t*)uc->uc_mcontext.gp_regs[1/*REG_SP*/];
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+#endif
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}
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intptr_t* os::Linux::ucontext_get_fp(const ucontext_t * uc) {
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@@ -252,7 +266,13 @@
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// 3.2.1 "Machine State Register"), however note that ISA notation for bit
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// numbering is MSB 0, so for normal bit numbering (LSB 0) they come to be
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// bits 33 and 34. It's not related to endianness, just a notation matter.
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+#if defined(__GLIBC__) || defined(__UCLIBC__)
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if (second_uc->uc_mcontext.regs->msr & 0x600000000) {
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+#else // Musl
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+ // why 33?
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+ // see comment for glibc NGREG: "r0-r31, nip, msr, lr, etc."
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+ if (second_uc->uc_mcontext.gp_regs[33] & 0x600000000) {
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+#endif
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if (TraceTraps) {
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tty->print_cr("caught signal in transaction, "
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"ignoring to jump to abort handler");
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@@ -558,6 +578,7 @@
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const ucontext_t* uc = (const ucontext_t*)context;
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st->print_cr("Registers:");
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+#if defined(__GLIBC__) || defined(__UCLIBC__)
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st->print("pc =" INTPTR_FORMAT " ", uc->uc_mcontext.regs->nip);
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st->print("lr =" INTPTR_FORMAT " ", uc->uc_mcontext.regs->link);
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st->print("ctr=" INTPTR_FORMAT " ", uc->uc_mcontext.regs->ctr);
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@@ -566,8 +587,18 @@
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st->print("r%-2d=" INTPTR_FORMAT " ", i, uc->uc_mcontext.regs->gpr[i]);
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if (i % 3 == 2) st->cr();
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}
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+#else // Musl
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+ st->print("pc =" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[32]);
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+ st->print("lr =" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[36]);
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+ st->print("ctr=" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[35]);
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st->cr();
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+ for (int i = 0; i < 32; i++) {
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+ st->print("r%-2d=" INTPTR_FORMAT " ", i, uc->uc_mcontext.gp_regs[i]);
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+ if (i % 3 == 2) st->cr();
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+ }
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+#endif
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st->cr();
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+ st->cr();
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intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc);
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st->print_cr("Top of Stack: (sp=" PTR_FORMAT ")", p2i(sp));
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@@ -594,7 +625,11 @@
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// this is only for the "general purpose" registers
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for (int i = 0; i < 32; i++) {
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st->print("r%-2d=", i);
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+#if defined(__GLIBC__) || defined(__UCLIBC__)
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print_location(st, uc->uc_mcontext.regs->gpr[i]);
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+#else // Musl
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+ print_location(st, uc->uc_mcontext.gp_regs[i]);
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+#endif
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}
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st->cr();
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}
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