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aarch64: do not generate a wasteful stack anymore 

Until now, each element on the compiled program stack was 128 bits long,
half of them unused because only one 64 bits value was stored.

Now it's 64 bits long, so we don't waste all that memory.

We workaround the architectural alignment restriction of the SP register by
using a free regular register. X18 is for platform use so it seems a good
candidate for this task.

At _start we copy the value of SP into X18. SP is not used anymore. When a
definition refers to SP it doesn't mean it literaly now, because here we
redefine (without renaming) the involved M1 macro definitions to operate
on X18 (easier transition; abstraction). INIT_SP is introduced.

The function arguments are passed via stack, so the offset from the Base
Pointer ("depth") to each of them is different now. Changes both to
compiler code (cc_core.c) and libc reflect that the arguments are 8 bytes
(instead of 16 bytes) apart now. Note that SUB_X0_32 and SUB_X0_48 are
removed, because we only need 8, 16 and 24 bytes subtraction to reach the
arguments from asm libc functions. SUB_X0_8 and SUB_X0_24 are introduced.
This commit is contained in:
deesix 2020-02-08 00:16:54 +01:00
parent b2b1e13b03
commit b2ece54864
17 changed files with 100 additions and 92 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
CHANGELOG.org
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@ -21,6 +21,7 @@ Added test for chdir and getcwd family of posix primitives
** Changed
** Fixed
AArch64 wasteful stack
** Removed

20
HACKING
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@ -273,12 +273,16 @@ tmp, oLR and oBP again) leaving everything as it was before this
journey. Well... one important thing changed: following M2-Planet
conventions the value returned from the function, if any, is on X0.
*** Wasted stack space
*** Stack pointer
Due to alignment (128 bits) restriction for "push" and "pop" we waste
half of the stack space in the running generated binaries, as the
values are only 64 bits. Using another register as stack pointer would
work around the architectural restriction but this solution is not
implemented yet. Adjustment to several definitions and functions is
required, to reflect the new "depth" of the elements and the change of
register.
Due to alignment (128 bits) restriction for "push" and "pop" based on
the architectural register, we initialize and use X18 as stack pointer
instead.
The M1 definitions referring to SP use X18; stack operations too.
For example:
DEFINE LDR_X0_[SP] 400240f9 is ldr x0, [x18]
DEFINE PUSH_LR 5e8e1ff8 is str x30, [x18, #-8]!
DEFINE INIT_SP f2030091 is mov x18, sp

12
cc_core.c
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@ -1100,7 +1100,7 @@ void collect_local()
else if(X86 == Architecture) a->depth = -20;
else if(AMD64 == Architecture) a->depth = -40;
else if(ARMV7L == Architecture) a->depth = 16;
else if(AARCH64 == Architecture) a->depth = 64; /* argc, argv, envp and the local (16 bytes each) */
else if(AARCH64 == Architecture) a->depth = 32; /* argc, argv, envp and the local (8 bytes each) */
}
else if((NULL == function->arguments) && (NULL == function->locals))
{
@ -1108,7 +1108,7 @@ void collect_local()
else if(X86 == Architecture) a->depth = -8;
else if(AMD64 == Architecture) a->depth = -16;
else if(ARMV7L == Architecture) a->depth = 8;
else if(AARCH64 == Architecture) a->depth = 16;
else if(AARCH64 == Architecture) a->depth = register_size;
}
else if(NULL == function->locals)
{
@ -1116,7 +1116,7 @@ void collect_local()
else if(X86 == Architecture) a->depth = function->arguments->depth - 8;
else if(AMD64 == Architecture) a->depth = function->arguments->depth - 16;
else if(ARMV7L == Architecture) a->depth = function->arguments->depth + 8;
else if(AARCH64 == Architecture) a->depth = function->arguments->depth + 16;
else if(AARCH64 == Architecture) a->depth = function->arguments->depth + register_size;
}
else
{
@ -1124,7 +1124,7 @@ void collect_local()
else if(X86 == Architecture) a->depth = function->locals->depth - register_size;
else if(AMD64 == Architecture) a->depth = function->locals->depth - register_size;
else if(ARMV7L == Architecture) a->depth = function->locals->depth + register_size;
else if(AARCH64 == Architecture) a->depth = function->locals->depth + 16;
else if(AARCH64 == Architecture) a->depth = function->locals->depth + register_size;
}
function->locals = a;
@ -1631,7 +1631,7 @@ void collect_arguments()
else if(X86 == Architecture) a->depth = -4;
else if(AMD64 == Architecture) a->depth = -8;
else if(ARMV7L == Architecture) a->depth = 4;
else if(AARCH64 == Architecture) a->depth = 16;
else if(AARCH64 == Architecture) a->depth = register_size;
}
else
{
@ -1639,7 +1639,7 @@ void collect_arguments()
else if(X86 == Architecture) a->depth = function->arguments->depth - register_size;
else if(AMD64 == Architecture) a->depth = function->arguments->depth - register_size;
else if(ARMV7L == Architecture) a->depth = function->arguments->depth + register_size;
else if(AARCH64 == Architecture) a->depth = function->arguments->depth + 16;
else if(AARCH64 == Architecture) a->depth = function->arguments->depth + register_size;
}
global_token = global_token->next;

38
test/common_aarch64/aarch64_defs.M1
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@ -16,18 +16,20 @@
DEFINE NULL 0000000000000000
# Stack (SP-based, 128 bits per element)
DEFINE PUSH_X0 e00f1ff8
DEFINE PUSH_X1 e10f1ff8
DEFINE PUSH_X16 f00f1ff8
DEFINE PUSH_BP f10f1ff8
DEFINE PUSH_LR fe0f1ff8
# Stack (x18 as SP, 64 bits per element)
DEFINE PUSH_X0 408e1ff8
DEFINE PUSH_X1 418e1ff8
DEFINE PUSH_X16 508e1ff8
DEFINE PUSH_BP 518e1ff8
DEFINE PUSH_LR 5e8e1ff8
DEFINE POP_X0 e00741f8
DEFINE POP_X1 e10741f8
DEFINE POP_X16 f00741f8
DEFINE POP_BP f10741f8
DEFINE POP_LR fe0741f8
DEFINE POP_X0 408640f8
DEFINE POP_X1 418640f8
DEFINE POP_X16 508640f8
DEFINE POP_BP 518640f8
DEFINE POP_LR 5e8640f8
DEFINE INIT_SP f2030091 # mov x18, sp
# Jump/branch/call/return
@ -56,7 +58,7 @@ DEFINE LOAD_W16_AHEAD 50000018
# Load/store/dereference
DEFINE LDR_X0_[SP] e00340f9
DEFINE LDR_X0_[SP] 400240f9
DEFINE STR_X0_[X1] 200000f9
DEFINE STR_BYTE_W0_[X1] 20000039
DEFINE DEREF_X0 000040f9
@ -66,16 +68,16 @@ DEFINE DEREF_X0_BYTE 00004039
# Move data between registers
DEFINE SET_X0_FROM_BP e00311aa
DEFINE SET_X1_FROM_X0 e10300aa
DEFINE SET_X1_FROM_SP e1030091
DEFINE SET_X1_FROM_SP e10312aa
DEFINE SET_X2_FROM_X0 e20300aa
DEFINE SET_X3_FROM_X0 e30300aa
DEFINE SET_X4_FROM_X0 e40300aa
DEFINE SET_X5_FROM_X0 e50300aa
DEFINE SET_X6_FROM_X0 e60300aa
DEFINE SET_X16_FROM_X0 f00300aa
DEFINE SET_X16_FROM_SP f0030091
DEFINE SET_X16_FROM_SP f00312aa
DEFINE SET_BP_FROM_X16 f10310aa
DEFINE SET_BP_FROM_SP f1030091
DEFINE SET_BP_FROM_SP f10312aa
# Move constant to register
@ -94,13 +96,13 @@ DEFINE SET_X0_TO_FCNTL_H_AT_FDCWD 600c8092
# Arith/logic/relational
DEFINE ADD_X0_X1_X0 2000008b
DEFINE ADD_X0_BP_X0 2002008b
DEFINE ADD_X1_SP_8 e1230091
DEFINE ADD_X1_SP_8 41220091
DEFINE SUB_X0_X1_X0 200000cb
DEFINE SUB_X0_X0_X1 000001cb
DEFINE SUB_X0_8 002000d1
DEFINE SUB_X0_16 004000d1
DEFINE SUB_X0_32 008000d1
DEFINE SUB_X0_48 00c000d1
DEFINE SUB_X0_24 006000d1
DEFINE MSUB_X0_X0_X2_X1 0084029b
DEFINE MUL_X0_X1_X0 207c009b

4
test/common_aarch64/functions/access.c
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@ -17,9 +17,9 @@
int access(char* pathname, int mode)
{
asm("SET_X0_FROM_BP" "SUB_X0_32" "DEREF_X0"
asm("SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
"SET_X2_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
"SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X1_FROM_X0"
"SET_X0_TO_0"
"SET_X3_FROM_X0"

4
test/common_aarch64/functions/chdir.c
View File

@ -17,14 +17,14 @@
int chdir(char* path)
{
asm("SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
asm("SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X8_TO_SYS_CHDIR"
"SYSCALL");
}
int fchdir(int fd)
{
asm("SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
asm("SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X8_TO_SYS_FCHDIR"
"SYSCALL");
}

12
test/common_aarch64/functions/execve.c
View File

@ -26,11 +26,11 @@ int waitpid(int pid, int* status_ptr, int options)
{
asm("SET_X0_TO_MINUS_1"
"SET_X3_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_48" "DEREF_X0"
"SET_X0_FROM_BP" "SUB_X0_24" "DEREF_X0"
"SET_X2_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_32" "DEREF_X0"
"SET_X1_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
"SET_X1_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X8_TO_SYS_WAIT4"
"SYSCALL");
}
@ -38,11 +38,11 @@ int waitpid(int pid, int* status_ptr, int options)
int execve(char* file_name, char** argv, char** envp)
{
asm(
"SET_X0_FROM_BP" "SUB_X0_48" "DEREF_X0"
"SET_X0_FROM_BP" "SUB_X0_24" "DEREF_X0"
"SET_X2_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_32" "DEREF_X0"
"SET_X1_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
"SET_X1_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X8_TO_SYS_EXECVE"
"SYSCALL");
}

2
test/common_aarch64/functions/exit.c
View File

@ -20,7 +20,7 @@
void exit(int value)
{
asm("SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
asm("SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X8_TO_SYS_EXIT"
"SYSCALL");
}

14
test/common_aarch64/functions/file.c
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@ -23,7 +23,7 @@
int fgetc(FILE* f)
{
asm("SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
asm("SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"PUSH_X0"
"SET_X1_FROM_SP"
"SET_X2_TO_1"
@ -39,9 +39,9 @@ int fgetc(FILE* f)
void fputc(char s, FILE* f)
{
asm("SET_X0_FROM_BP" "SUB_X0_16"
asm("SET_X0_FROM_BP" "SUB_X0_8"
"SET_X1_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_32" "DEREF_X0"
"SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
"SET_X2_TO_1"
"SET_X8_TO_SYS_WRITE"
"SYSCALL");
@ -61,11 +61,11 @@ void fputc(char s, FILE* f)
FILE* open(char* name, int flag, int mode)
{
asm("SET_X0_FROM_BP" "SUB_X0_48" "DEREF_X0"
asm("SET_X0_FROM_BP" "SUB_X0_24" "DEREF_X0"
"SET_X3_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_32" "DEREF_X0"
"SET_X2_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
"SET_X2_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X1_FROM_X0"
"SET_X0_TO_FCNTL_H_AT_FDCWD"
"SET_X8_TO_SYS_OPENAT"
@ -93,7 +93,7 @@ FILE* fopen(char* filename, char* mode)
int close(int fd)
{
asm("SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
asm("SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X8_TO_SYS_CLOSE"
"SYSCALL");
}

4
test/common_aarch64/functions/getcwd.c
View File

@ -22,9 +22,9 @@
int _getcwd(char* buf, size_t size)
{
asm("SET_X0_FROM_BP" "SUB_X0_32" "DEREF_X0"
asm("SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
"SET_X1_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
"SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X8_TO_SYS_GETCWD"
"SYSCALL");
}

2
test/common_aarch64/functions/malloc.c
View File

@ -19,7 +19,7 @@
void* malloc(int size)
{
asm("SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
asm("SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X1_FROM_X0"
"SET_X0_TO_0" "SET_X8_TO_SYS_BRK" "SYSCALL"
"PUSH_X0"

2
test/common_aarch64/functions/putchar.c
View File

@ -17,7 +17,7 @@
void putchar(int c)
{
asm("SET_X0_FROM_BP" "SUB_X0_16"
asm("SET_X0_FROM_BP" "SUB_X0_8"
"SET_X1_FROM_X0"
"SET_X0_TO_1"
"SET_X2_TO_1"

4
test/common_aarch64/functions/stat.c
View File

@ -43,9 +43,9 @@
int chmod(char *pathname, int mode)
{
asm("SET_X0_FROM_BP" "SUB_X0_32" "DEREF_X0"
asm("SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
"SET_X2_FROM_X0"
"SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
"SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X1_FROM_X0"
"SET_X0_TO_0"
"SET_X3_FROM_X0"

2
test/common_aarch64/functions/uname.c
View File

@ -27,7 +27,7 @@ struct utsname
int uname(struct utsname* unameData)
{
asm("SET_X0_FROM_BP" "SUB_X0_16" "DEREF_X0"
asm("SET_X0_FROM_BP" "SUB_X0_8" "DEREF_X0"
"SET_X8_TO_SYS_UNAME"
"SYSCALL");
}

1
test/common_aarch64/libc-core.M1
View File

@ -15,6 +15,7 @@
## along with M2-Planet. If not, see <http://www.gnu.org/licenses/>.
:_start
INIT_SP
LDR_X0_[SP]
ADD_X1_SP_8
SET_BP_FROM_SP

68
test/test.answers
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@ -1,164 +1,164 @@
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