79 lines
3.5 KiB
C
79 lines
3.5 KiB
C
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <css_pm.h>
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#include <plat_arm.h>
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/*
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* Custom `validate_power_state` handler for Juno. According to PSCI
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* Specification, interrupts targeted to cores in PSCI CPU SUSPEND should
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* be able to resume it. On Juno, when the system power domain is suspended,
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* the GIC is also powered down. The SCP resumes the final core to be suspend
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* when an external wake-up event is received. But the other cores cannot be
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* woken up by a targeted interrupt, because GIC doesn't forward these
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* interrupts to the SCP. Due to this hardware limitation, we down-grade PSCI
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* CPU SUSPEND requests targeted to the system power domain level
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* to cluster power domain level.
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*
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* The system power domain suspend on Juno is only supported only via
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* PSCI SYSTEM SUSPEND API.
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*/
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static int juno_validate_power_state(unsigned int power_state,
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psci_power_state_t *req_state)
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{
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int rc;
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rc = arm_validate_power_state(power_state, req_state);
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/*
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* Ensure that the system power domain level is never suspended
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* via PSCI CPU SUSPEND API. Currently system suspend is only
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* supported via PSCI SYSTEM SUSPEND API.
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*/
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req_state->pwr_domain_state[ARM_PWR_LVL2] = ARM_LOCAL_STATE_RUN;
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return rc;
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}
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/*******************************************************************************
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* Export the platform handlers via plat_arm_psci_pm_ops. The ARM Standard
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* platform will take care of registering the handlers with PSCI.
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******************************************************************************/
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const plat_psci_ops_t plat_arm_psci_pm_ops = {
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.pwr_domain_on = css_pwr_domain_on,
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.pwr_domain_on_finish = css_pwr_domain_on_finish,
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.pwr_domain_off = css_pwr_domain_off,
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.cpu_standby = css_cpu_standby,
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.pwr_domain_suspend = css_pwr_domain_suspend,
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.pwr_domain_suspend_finish = css_pwr_domain_suspend_finish,
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.system_off = css_system_off,
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.system_reset = css_system_reset,
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.validate_power_state = juno_validate_power_state,
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.validate_ns_entrypoint = arm_validate_ns_entrypoint,
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.get_sys_suspend_power_state = css_get_sys_suspend_power_state
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};
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