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arm-trusted-firmware/services/psci/psci_private.h

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ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
/*
Update year in copyright text to 2014 Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
2014-01-14 18:17:09 +00:00
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Neither the name of ARM nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __PSCI_PRIVATE_H__
#define __PSCI_PRIVATE_H__
psci: replace secure context with suspend context The secure context saved and restored across a cpu_suspend operation can be more than just the state of the secure system registers e.g. we also need to save the affinity level till which the cpu is being powered down. This patch creates a suspend_context data structure which includes the system register context. This will allow other bits to be saved and restored as well in subsequent patches. Change-Id: I1c1f7d25497388b54b7d6ee4fab77e8c6a9992c4
2013-12-05 14:21:04 +00:00
#include <arch.h>
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
#include <bakery_lock.h>
#ifndef __ASSEMBLY__
/*******************************************************************************
* The following two data structures hold the generic information to bringup
* a suspended/hotplugged out cpu
******************************************************************************/
typedef struct {
unsigned long entrypoint;
unsigned long spsr;
} eret_params;
typedef struct {
eret_params eret_info;
unsigned long context_id;
unsigned int scr;
unsigned int sctlr;
} ns_entry_info;
/*******************************************************************************
* The following two data structures hold the topology tree which in turn tracks
* the state of the all the affinity instances supported by the platform.
******************************************************************************/
typedef struct {
unsigned long mpidr;
psci: fix affinity level upgrade issue The psci implementation does not track target affinity level requests specified during cpu_suspend calls correctly as per the following example. 1. cpu0.cluster0 calls cpu_suspend with the target affinity level as 0 2. Only the cpu0.cluster0 is powered down while cluster0 remains powered up 3. cpu1.cluster0 calls cpu_off to power itself down to highest possible affinity level 4. cluster0 will be powered off even though cpu0.cluster0 does not allow cluster shutdown This patch introduces reference counts at affinity levels > 0 to track the number of cpus which want an affinity instance at level X to remain powered up. This instance can be turned off only if its reference count is 0. Cpus still undergo the normal state transitions (ON, OFF, ON_PENDING, SUSPEND) but the higher levels can only be either ON or OFF depending upon their reference count. The above issue is thus fixed as follows: 1. cluster0's reference count is incremented by two when cpu0 and cpu1 are initially powered on. 2. cpu0.cluster0 calls cpu_suspend with the target affinity level as 0. This does not affect the cluster0 reference count. 3. Only the cpu0.cluster0 is powered down while cluster0 remains powered up as it has a non-zero reference count. 4. cpu1.cluster0 call cpu_off to power itself down to highest possible affinity level. This decrements the cluster0 reference count. 5. cluster0 is still not powered off since its reference count will at least be 1 due to the restriction placed by cpu0. Change-Id: I433dfe82b946f5f6985b1602c2de87800504f7a9
2013-12-05 16:33:10 +00:00
unsigned short ref_count;
ARMv8 Trusted Firmware release v0.2
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unsigned char state;
psci: fix affinity level upgrade issue The psci implementation does not track target affinity level requests specified during cpu_suspend calls correctly as per the following example. 1. cpu0.cluster0 calls cpu_suspend with the target affinity level as 0 2. Only the cpu0.cluster0 is powered down while cluster0 remains powered up 3. cpu1.cluster0 calls cpu_off to power itself down to highest possible affinity level 4. cluster0 will be powered off even though cpu0.cluster0 does not allow cluster shutdown This patch introduces reference counts at affinity levels > 0 to track the number of cpus which want an affinity instance at level X to remain powered up. This instance can be turned off only if its reference count is 0. Cpus still undergo the normal state transitions (ON, OFF, ON_PENDING, SUSPEND) but the higher levels can only be either ON or OFF depending upon their reference count. The above issue is thus fixed as follows: 1. cluster0's reference count is incremented by two when cpu0 and cpu1 are initially powered on. 2. cpu0.cluster0 calls cpu_suspend with the target affinity level as 0. This does not affect the cluster0 reference count. 3. Only the cpu0.cluster0 is powered down while cluster0 remains powered up as it has a non-zero reference count. 4. cpu1.cluster0 call cpu_off to power itself down to highest possible affinity level. This decrements the cluster0 reference count. 5. cluster0 is still not powered off since its reference count will at least be 1 due to the restriction placed by cpu0. Change-Id: I433dfe82b946f5f6985b1602c2de87800504f7a9
2013-12-05 16:33:10 +00:00
unsigned char level;
ARMv8 Trusted Firmware release v0.2
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unsigned int data;
bakery_lock lock;
} aff_map_node;
typedef struct {
int min;
int max;
} aff_limits_node;
psci: replace secure context with suspend context The secure context saved and restored across a cpu_suspend operation can be more than just the state of the secure system registers e.g. we also need to save the affinity level till which the cpu is being powered down. This patch creates a suspend_context data structure which includes the system register context. This will allow other bits to be saved and restored as well in subsequent patches. Change-Id: I1c1f7d25497388b54b7d6ee4fab77e8c6a9992c4
2013-12-05 14:21:04 +00:00
/*******************************************************************************
* This data structure holds secure world context that needs to be preserved
* across cpu_suspend calls which enter the power down state.
******************************************************************************/
typedef struct {
/* Align the suspend level to allow per-cpu lockless access */
int suspend_level
__attribute__((__aligned__(CACHE_WRITEBACK_GRANULE)));
} suspend_context;
psci: Use context library for preserving EL3 state This patch uses the context library to save and restore EL3 state on the 'cpu_context' data structures allocated by PSCI for managing non-secure state context on each cpu. Change-Id: I19c1f26578204a7cd9e0a6c582ced0d97ee4cf80
2014-02-01 08:59:56 +00:00
typedef aff_map_node (*mpidr_aff_map_nodes[MPIDR_MAX_AFFLVL]);
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typedef unsigned int (*afflvl_power_on_finisher)(unsigned long,
psci: rectify and homogenise generic code This patch performs a major rework of the psci generic implementation to achieve the following: 1. replace recursion with iteration where possible to aid code readability e.g. affinity instance states are changed iteratively instead of recursively. 2. acquire pointers to affinity instance nodes at the beginning of a psci operation. All subsequent actions use these pointers instead of calling psci_get_aff_map_node() repeatedly e.g. management of locks has been abstracted under functions which use these pointers to ensure correct ordering. Helper functions have been added to create these abstractions. 3. assertions have been added to cpu level handlers to ensure correct state transition 4. the affinity level extents specified to various functions have the same meaning i.e. start level is always less than the end level. Change-Id: If0508c3a7b20ea3ddda2a66128429382afc3dfc8
2013-12-02 17:33:04 +00:00
aff_map_node *);
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2013-10-25 09:08:21 +01:00
/*******************************************************************************
* Data prototypes
******************************************************************************/
psci: replace secure context with suspend context The secure context saved and restored across a cpu_suspend operation can be more than just the state of the secure system registers e.g. we also need to save the affinity level till which the cpu is being powered down. This patch creates a suspend_context data structure which includes the system register context. This will allow other bits to be saved and restored as well in subsequent patches. Change-Id: I1c1f7d25497388b54b7d6ee4fab77e8c6a9992c4
2013-12-05 14:21:04 +00:00
extern suspend_context psci_suspend_context[PSCI_NUM_AFFS];
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
extern ns_entry_info psci_ns_entry_info[PSCI_NUM_AFFS];
extern unsigned int psci_ns_einfo_idx;
extern aff_limits_node psci_aff_limits[MPIDR_MAX_AFFLVL + 1];
extern plat_pm_ops *psci_plat_pm_ops;
extern aff_map_node psci_aff_map[PSCI_NUM_AFFS];
extern afflvl_power_on_finisher psci_afflvl_off_finish_handlers[];
extern afflvl_power_on_finisher psci_afflvl_sus_finish_handlers[];
/*******************************************************************************
* Function prototypes
******************************************************************************/
/* Private exported functions from psci_common.c */
extern int get_max_afflvl(void);
psci: fix affinity level upgrade issue The psci implementation does not track target affinity level requests specified during cpu_suspend calls correctly as per the following example. 1. cpu0.cluster0 calls cpu_suspend with the target affinity level as 0 2. Only the cpu0.cluster0 is powered down while cluster0 remains powered up 3. cpu1.cluster0 calls cpu_off to power itself down to highest possible affinity level 4. cluster0 will be powered off even though cpu0.cluster0 does not allow cluster shutdown This patch introduces reference counts at affinity levels > 0 to track the number of cpus which want an affinity instance at level X to remain powered up. This instance can be turned off only if its reference count is 0. Cpus still undergo the normal state transitions (ON, OFF, ON_PENDING, SUSPEND) but the higher levels can only be either ON or OFF depending upon their reference count. The above issue is thus fixed as follows: 1. cluster0's reference count is incremented by two when cpu0 and cpu1 are initially powered on. 2. cpu0.cluster0 calls cpu_suspend with the target affinity level as 0. This does not affect the cluster0 reference count. 3. Only the cpu0.cluster0 is powered down while cluster0 remains powered up as it has a non-zero reference count. 4. cpu1.cluster0 call cpu_off to power itself down to highest possible affinity level. This decrements the cluster0 reference count. 5. cluster0 is still not powered off since its reference count will at least be 1 due to the restriction placed by cpu0. Change-Id: I433dfe82b946f5f6985b1602c2de87800504f7a9
2013-12-05 16:33:10 +00:00
extern unsigned short psci_get_state(aff_map_node *node);
extern unsigned short psci_get_phys_state(aff_map_node *node);
extern void psci_set_state(aff_map_node *node, unsigned short state);
psci: fix error due to a non zero context id In the previous psci implementation, the psci_afflvl_power_on_finish() function would run into an error condition if the value of the context id parameter in the cpu_on and cpu_suspend psci calls was != 0. The parameter was being restored as the return value of the affinity level 0 finisher function. A non zero context id would be treated as an error condition. This would prevent successful wake up of the cpu from a power down state. Also, the contents of the general purpose registers were not being cleared upon return to the non-secure world after a cpu power up. This could potentially allow the non-secure world to view secure data. This patch ensures that all general purpose registers are set to ~0 prior to the final eret that drops the execution to the non-secure world. The context id is used to initialize the general purpose register x0 prior to re-entry into the non-secure world and is no longer restored as a function return value. A platform helper (platform_get_stack()) has been introduced to facilitate this change. Change-Id: I2454911ffd75705d6aa8609a5d250d9b26fa097c
2013-11-25 18:45:02 +00:00
extern void psci_get_ns_entry_info(unsigned int index);
psci: Use context library for preserving EL3 state This patch uses the context library to save and restore EL3 state on the 'cpu_context' data structures allocated by PSCI for managing non-secure state context on each cpu. Change-Id: I19c1f26578204a7cd9e0a6c582ced0d97ee4cf80
2014-02-01 08:59:56 +00:00
extern unsigned long mpidr_set_aff_inst(unsigned long, unsigned char, int);
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
extern int psci_validate_mpidr(unsigned long, int);
psci: preserve target affinity level during suspend This patch adds support to save and restore the target affinity level specified during a cpu_suspend psci call. This ensures that we traverse only through the affinity levels that we originally intended to after resuming from suspend. Change-Id: I0900ae49a50b496da137cfec8f158da0397ec56c
2013-12-05 15:10:48 +00:00
extern int get_power_on_target_afflvl(unsigned long mpidr);
psci: rectify and homogenise generic code This patch performs a major rework of the psci generic implementation to achieve the following: 1. replace recursion with iteration where possible to aid code readability e.g. affinity instance states are changed iteratively instead of recursively. 2. acquire pointers to affinity instance nodes at the beginning of a psci operation. All subsequent actions use these pointers instead of calling psci_get_aff_map_node() repeatedly e.g. management of locks has been abstracted under functions which use these pointers to ensure correct ordering. Helper functions have been added to create these abstractions. 3. assertions have been added to cpu level handlers to ensure correct state transition 4. the affinity level extents specified to various functions have the same meaning i.e. start level is always less than the end level. Change-Id: If0508c3a7b20ea3ddda2a66128429382afc3dfc8
2013-12-02 17:33:04 +00:00
extern void psci_afflvl_power_on_finish(unsigned long,
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
int,
int,
afflvl_power_on_finisher *);
extern int psci_set_ns_entry_info(unsigned int index,
unsigned long entrypoint,
unsigned long context_id);
psci: rectify and homogenise generic code This patch performs a major rework of the psci generic implementation to achieve the following: 1. replace recursion with iteration where possible to aid code readability e.g. affinity instance states are changed iteratively instead of recursively. 2. acquire pointers to affinity instance nodes at the beginning of a psci operation. All subsequent actions use these pointers instead of calling psci_get_aff_map_node() repeatedly e.g. management of locks has been abstracted under functions which use these pointers to ensure correct ordering. Helper functions have been added to create these abstractions. 3. assertions have been added to cpu level handlers to ensure correct state transition 4. the affinity level extents specified to various functions have the same meaning i.e. start level is always less than the end level. Change-Id: If0508c3a7b20ea3ddda2a66128429382afc3dfc8
2013-12-02 17:33:04 +00:00
extern int psci_check_afflvl_range(int start_afflvl, int end_afflvl);
extern void psci_acquire_afflvl_locks(unsigned long mpidr,
int start_afflvl,
int end_afflvl,
mpidr_aff_map_nodes mpidr_nodes);
extern void psci_release_afflvl_locks(unsigned long mpidr,
int start_afflvl,
int end_afflvl,
mpidr_aff_map_nodes mpidr_nodes);
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
/* Private exported functions from psci_setup.c */
psci: rectify and homogenise generic code This patch performs a major rework of the psci generic implementation to achieve the following: 1. replace recursion with iteration where possible to aid code readability e.g. affinity instance states are changed iteratively instead of recursively. 2. acquire pointers to affinity instance nodes at the beginning of a psci operation. All subsequent actions use these pointers instead of calling psci_get_aff_map_node() repeatedly e.g. management of locks has been abstracted under functions which use these pointers to ensure correct ordering. Helper functions have been added to create these abstractions. 3. assertions have been added to cpu level handlers to ensure correct state transition 4. the affinity level extents specified to various functions have the same meaning i.e. start level is always less than the end level. Change-Id: If0508c3a7b20ea3ddda2a66128429382afc3dfc8
2013-12-02 17:33:04 +00:00
extern int psci_get_aff_map_nodes(unsigned long mpidr,
int start_afflvl,
int end_afflvl,
mpidr_aff_map_nodes mpidr_nodes);
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
extern aff_map_node *psci_get_aff_map_node(unsigned long, int);
/* Private exported functions from psci_affinity_on.c */
extern int psci_afflvl_on(unsigned long,
unsigned long,
unsigned long,
int,
int);
/* Private exported functions from psci_affinity_off.c */
extern int psci_afflvl_off(unsigned long, int, int);
/* Private exported functions from psci_affinity_suspend.c */
psci: preserve target affinity level during suspend This patch adds support to save and restore the target affinity level specified during a cpu_suspend psci call. This ensures that we traverse only through the affinity levels that we originally intended to after resuming from suspend. Change-Id: I0900ae49a50b496da137cfec8f158da0397ec56c
2013-12-05 15:10:48 +00:00
extern void psci_set_suspend_afflvl(aff_map_node *node, int afflvl);
extern int psci_get_suspend_afflvl(aff_map_node *node);
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
extern int psci_afflvl_suspend(unsigned long,
unsigned long,
unsigned long,
unsigned int,
int,
int);
extern unsigned int psci_afflvl_suspend_finish(unsigned long, int, int);
Add support for handling runtime service requests This patch uses the reworked exception handling support to handle runtime service requests through SMCs following the SMC calling convention. This is a giant commit since all the changes are inter-related. It does the following: 1. Replace the old exception handling mechanism with the new one 2. Enforce that SP_EL0 is used C runtime stacks. 3. Ensures that the cold and warm boot paths use the 'cpu_context' structure to program an ERET into the next lower EL. 4. Ensures that SP_EL3 always points to the next 'cpu_context' structure prior to an ERET into the next lower EL 5. Introduces a PSCI SMC handler which completes the use of PSCI as a runtime service Change-Id: I661797f834c0803d2c674d20f504df1b04c2b852 Co-authored-by: Achin Gupta <achin.gupta@arm.com>
2014-02-06 10:36:15 +00:00
/* Private exported functions from psci_main.c */
extern uint64_t psci_smc_handler(uint32_t smc_fid,
uint64_t x1,
uint64_t x2,
uint64_t x3,
uint64_t x4,
void *cookie,
void *handle,
uint64_t flags);
ARMv8 Trusted Firmware release v0.2
2013-10-25 09:08:21 +01:00
#endif /*__ASSEMBLY__*/
#endif /* __PSCI_PRIVATE_H__ */