209 lines
7.4 KiB
C
209 lines
7.4 KiB
C
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/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*******************************************************************************
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* This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a
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* plug-in component to the Secure Monitor, registered as a runtime service. The
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* SPD is expected to be a functional extension of the Secure Payload (SP) that
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* executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting
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* the Trusted OS/Applications range to the dispatcher. The SPD will either
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* handle the request locally or delegate it to the Secure Payload. It is also
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* responsible for initialising and maintaining communication with the SP.
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******************************************************************************/
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#include <stdio.h>
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#include <string.h>
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#include <assert.h>
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#include <arch_helpers.h>
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#include <console.h>
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#include <platform.h>
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#include <psci_private.h>
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#include <context_mgmt.h>
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#include <runtime_svc.h>
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#include <bl31.h>
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#include <tsp.h>
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#include <psci.h>
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#include <tspd_private.h>
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#include <debug.h>
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/*******************************************************************************
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* Single structure to hold information about the various entry points into the
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* Secure Payload. It is initialised once on the primary core after a cold boot.
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******************************************************************************/
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entry_info *tsp_entry_info;
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/*******************************************************************************
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* Array to keep track of per-cpu Secure Payload state
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******************************************************************************/
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tsp_context tspd_sp_context[TSPD_CORE_COUNT];
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/*******************************************************************************
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* Secure Payload Dispatcher setup. The SPD finds out the SP entrypoint and type
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* (aarch32/aarch64) if not already known and initialises the context for entry
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* into the SP for its initialisation.
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******************************************************************************/
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int32_t tspd_setup(void)
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{
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el_change_info *image_info;
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int32_t rc;
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uint64_t mpidr = read_mpidr();
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uint32_t linear_id;
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linear_id = platform_get_core_pos(mpidr);
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/*
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* Get information about the Secure Payload (BL32) image. Its
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* absence is a critical failure. TODO: Add support to
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* conditionally include the SPD service
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*/
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image_info = bl31_get_next_image_info(SECURE);
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assert(image_info);
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/*
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* We could inspect the SP image and determine it's execution
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* state i.e whether AArch32 or AArch64. Assuming it's AArch64
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* for the time being.
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*/
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rc = tspd_init_secure_context(image_info->entrypoint,
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TSP_AARCH64,
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mpidr,
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&tspd_sp_context[linear_id]);
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assert(rc == 0);
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return rc;
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}
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/*******************************************************************************
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* This function passes control to the Secure Payload image (BL32) for the first
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* time on the primary cpu after a cold boot. It assumes that a valid secure
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* context has already been created by tspd_setup() which can be directly used.
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* It also assumes that a valid non-secure context has been initialised by PSCI
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* so it does not need to save and restore any non-secure state. This function
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* performs a synchronous entry into the Secure payload. The SP passes control
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* back to this routine through a SMC. It also passes the extents of memory made
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* available to BL32 by BL31.
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******************************************************************************/
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int32_t bl32_init(meminfo *bl32_meminfo)
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{
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uint64_t mpidr = read_mpidr();
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uint32_t linear_id = platform_get_core_pos(mpidr);
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uint64_t rc;
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tsp_context *tsp_ctx = &tspd_sp_context[linear_id];
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/*
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* Arrange for passing a pointer to the meminfo structure
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* describing the memory extents available to the secure
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* payload.
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* TODO: We are passing a pointer to BL31 internal memory
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* whereas this structure should be copied to a communication
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* buffer between the SP and SPD.
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*/
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write_ctx_reg(get_gpregs_ctx(&tsp_ctx->cpu_ctx),
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CTX_GPREG_X0,
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(uint64_t) bl32_meminfo);
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/* Arrange for an entry into the secure payload */
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rc = tspd_synchronous_sp_entry(tsp_ctx);
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assert(rc != 0);
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if (rc)
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tsp_ctx->state = TSP_STATE_ON;
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return rc;
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}
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/*******************************************************************************
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* This function is responsible for handling all SMCs in the Trusted OS/App
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* range from the non-secure state as defined in the SMC Calling Convention
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* Document. It is also responsible for communicating with the Secure payload
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* to delegate work and return results back to the non-secure state. Lastly it
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* will also return any information that the secure payload needs to do the
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* work assigned to it.
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******************************************************************************/
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uint64_t tspd_smc_handler(uint32_t smc_fid,
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uint64_t x1,
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uint64_t x2,
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uint64_t x3,
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uint64_t x4,
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void *cookie,
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void *handle,
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uint64_t flags)
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{
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unsigned long mpidr = read_mpidr();
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uint32_t linear_id = platform_get_core_pos(mpidr), ns;
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/* Determine which security state this SMC originated from */
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ns = is_caller_non_secure(flags);
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switch (smc_fid) {
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/*
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* This function ID is used only by the SP to indicate it has
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* finished initialising itself after a cold boot
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*/
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case TSP_ENTRY_DONE:
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if (ns)
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SMC_RET1(handle, SMC_UNK);
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/*
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* Stash the SP entry points information. This is done
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* only once on the primary cpu
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*/
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assert(tsp_entry_info == NULL);
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tsp_entry_info = (entry_info *) x1;
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/*
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* SP reports completion. The SPD must have initiated
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* the original request through a synchronous entry
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* into the SP. Jump back to the original C runtime
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* context.
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*/
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tspd_synchronous_sp_exit(&tspd_sp_context[linear_id], x1);
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/* Should never reach here */
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assert(0);
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default:
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panic();
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}
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SMC_RET1(handle, 0);
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}
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/* Define a SPD runtime service descriptor */
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DECLARE_RT_SVC(
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spd,
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OEN_TOS_START,
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OEN_TOS_END,
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SMC_TYPE_FAST,
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tspd_setup,
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tspd_smc_handler
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);
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