2017-11-05 21:56:34 +00:00
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/*
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2019-02-11 13:34:15 +00:00
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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2017-11-05 21:56:34 +00:00
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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2018-11-08 10:20:19 +00:00
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#ifndef CORTEX_A7_H
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#define CORTEX_A7_H
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2017-11-05 21:56:34 +00:00
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2019-02-11 13:34:15 +00:00
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#include <lib/utils_def.h>
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2017-11-05 21:56:34 +00:00
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/*******************************************************************************
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* Cortex-A7 midr with version/revision set to 0
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******************************************************************************/
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2019-02-11 13:34:15 +00:00
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#define CORTEX_A7_MIDR U(0x410FC070)
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2017-11-05 21:56:34 +00:00
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/*******************************************************************************
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* CPU Auxiliary Control register specific definitions.
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******************************************************************************/
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2019-02-11 13:34:15 +00:00
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#define CORTEX_A7_ACTLR_SMP_BIT (U(1) << 6)
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2017-11-05 21:56:34 +00:00
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2018-11-08 10:20:19 +00:00
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#endif /* CORTEX_A7_H */
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