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arm-trusted-firmware/plat/rockchip/common/pmusram/pmu_sram_cpus_on.S

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Support for Rockchip's family SoCs This patch adds to support the RK3368 and RK3399 SoCs. RK3368/RK3399 is one of the Rockchip family SoCs, which is an multi-cores ARM SoCs. This patch adds support to boot the Trusted Firmware on RK3368/RK3399 SoCs, and adds support to boot secondary CPUs, enter/exit core power states for all CPUs in the slow/fast clusters. This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs) * Support arm gicv2 & gicv3. * Boot up multi-cores CPU. * Add generic CPU helper functions. * Support suspend/resume. * Add system_off & system_reset implementation. * Add delay timer platform implementation. * Support the new porting interface for the PSCI implementation. Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43 Signed-off-by: Tony Xie <tony.xie@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Shengfei xu <xsf@rock-chips.com>
2016-01-15 09:17:32 +00:00
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
*
Use SPDX license identifiers To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-05-03 09:38:09 +01:00
* SPDX-License-Identifier: BSD-3-Clause
Support for Rockchip's family SoCs This patch adds to support the RK3368 and RK3399 SoCs. RK3368/RK3399 is one of the Rockchip family SoCs, which is an multi-cores ARM SoCs. This patch adds support to boot the Trusted Firmware on RK3368/RK3399 SoCs, and adds support to boot secondary CPUs, enter/exit core power states for all CPUs in the slow/fast clusters. This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs) * Support arm gicv2 & gicv3. * Boot up multi-cores CPU. * Add generic CPU helper functions. * Support suspend/resume. * Add system_off & system_reset implementation. * Add delay timer platform implementation. * Support the new porting interface for the PSCI implementation. Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43 Signed-off-by: Tony Xie <tony.xie@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Shengfei xu <xsf@rock-chips.com>
2016-01-15 09:17:32 +00:00
*/
#include <arch.h>
#include <asm_macros.S>
#include <platform_def.h>
rockchip: add pmusram section the function pmu_cpuon_entrypoint() need to run in the pmusram, we just copy bin file to pmusram before, now we add pmusram section and link pmu_cpuon_entrypoint() to pmusram directly Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2017-05-04 09:02:45 +01:00
.globl pmu_cpuson_entrypoint
.macro pmusram_entry_func _name
.section .pmusram.entry, "ax"
.type \_name, %function
.func \_name
.cfi_startproc
\_name:
.endm
Support for Rockchip's family SoCs This patch adds to support the RK3368 and RK3399 SoCs. RK3368/RK3399 is one of the Rockchip family SoCs, which is an multi-cores ARM SoCs. This patch adds support to boot the Trusted Firmware on RK3368/RK3399 SoCs, and adds support to boot secondary CPUs, enter/exit core power states for all CPUs in the slow/fast clusters. This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs) * Support arm gicv2 & gicv3. * Boot up multi-cores CPU. * Add generic CPU helper functions. * Support suspend/resume. * Add system_off & system_reset implementation. * Add delay timer platform implementation. * Support the new porting interface for the PSCI implementation. Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43 Signed-off-by: Tony Xie <tony.xie@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Shengfei xu <xsf@rock-chips.com>
2016-01-15 09:17:32 +00:00
rockchip: add pmusram section the function pmu_cpuon_entrypoint() need to run in the pmusram, we just copy bin file to pmusram before, now we add pmusram section and link pmu_cpuon_entrypoint() to pmusram directly Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2017-05-04 09:02:45 +01:00
pmusram_entry_func pmu_cpuson_entrypoint
#if PSRAM_DO_DDR_RESUME
Support for Rockchip's family SoCs This patch adds to support the RK3368 and RK3399 SoCs. RK3368/RK3399 is one of the Rockchip family SoCs, which is an multi-cores ARM SoCs. This patch adds support to boot the Trusted Firmware on RK3368/RK3399 SoCs, and adds support to boot secondary CPUs, enter/exit core power states for all CPUs in the slow/fast clusters. This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs) * Support arm gicv2 & gicv3. * Boot up multi-cores CPU. * Add generic CPU helper functions. * Support suspend/resume. * Add system_off & system_reset implementation. * Add delay timer platform implementation. * Support the new porting interface for the PSCI implementation. Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43 Signed-off-by: Tony Xie <tony.xie@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Shengfei xu <xsf@rock-chips.com>
2016-01-15 09:17:32 +00:00
ddr_resume:
rockchip: add pmusram section the function pmu_cpuon_entrypoint() need to run in the pmusram, we just copy bin file to pmusram before, now we add pmusram section and link pmu_cpuon_entrypoint() to pmusram directly Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2017-05-04 09:02:45 +01:00
ldr x2, =__bl31_sram_stack_end
mov sp, x2
bl dmc_restore
#endif
rockchip/rk3399: enable PMU_PERILP_PD_EN bit when suspend with PMU_PERILP_PD_EN bit enable, the soc will shutdown cm0, crypto, dcf, imem(normal SRAM), dmac, bootrom, efuse_con, spi, i2c, uart, saradc, tsadc when suspend, we have M0 code need to run when suspend in normal SRAM, so we need to take care of that. Change-Id: I8c066637e5b81d4b1d53197450b9d592cbe00793 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Derek Basehore <dbasehore@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2017-05-16 09:40:46 +01:00
bl sram_restore
rockchip: add pmusram section the function pmu_cpuon_entrypoint() need to run in the pmusram, we just copy bin file to pmusram before, now we add pmusram section and link pmu_cpuon_entrypoint() to pmusram directly Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2017-05-04 09:02:45 +01:00
sys_resume:
bl psci_entrypoint
Support for Rockchip's family SoCs This patch adds to support the RK3368 and RK3399 SoCs. RK3368/RK3399 is one of the Rockchip family SoCs, which is an multi-cores ARM SoCs. This patch adds support to boot the Trusted Firmware on RK3368/RK3399 SoCs, and adds support to boot secondary CPUs, enter/exit core power states for all CPUs in the slow/fast clusters. This is the initial version for rockchip SoCs.(RK3368/RK3399 and next SoCs) * Support arm gicv2 & gicv3. * Boot up multi-cores CPU. * Add generic CPU helper functions. * Support suspend/resume. * Add system_off & system_reset implementation. * Add delay timer platform implementation. * Support the new porting interface for the PSCI implementation. Change-Id: I704bb3532d65e8c70dbd99b512c5e6e440ea6f43 Signed-off-by: Tony Xie <tony.xie@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Shengfei xu <xsf@rock-chips.com>
2016-01-15 09:17:32 +00:00
endfunc pmu_cpuson_entrypoint