2016-03-18 20:07:33 +00:00
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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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*
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2017-05-03 09:38:09 +01:00
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* SPDX-License-Identifier: BSD-3-Clause
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2016-03-18 20:07:33 +00:00
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <memctrl_v2.h>
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2018-12-14 00:18:21 +00:00
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#include <plat/common/common_def.h>
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2016-03-18 20:07:33 +00:00
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#include <tegra_def.h>
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#define TEGRA186_SMMU_CTX_SIZE 0x420
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.globl tegra186_cpu_reset_handler
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/* CPU reset handler routine */
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Add new alignment parameter to func assembler macro
Assembler programmers are used to being able to define functions with a
specific aligment with a pattern like this:
.align X
myfunction:
However, this pattern is subtly broken when instead of a direct label
like 'myfunction:', you use the 'func myfunction' macro that's standard
in Trusted Firmware. Since the func macro declares a new section for the
function, the .align directive written above it actually applies to the
*previous* section in the assembly file, and the function it was
supposed to apply to is linked with default alignment.
An extreme case can be seen in Rockchip's plat_helpers.S which contains
this code:
[...]
endfunc plat_crash_console_putc
.align 16
func platform_cpu_warmboot
[...]
This assembles into the following plat_helpers.o:
Sections:
Idx Name Size [...] Algn
9 .text.plat_crash_console_putc 00010000 [...] 2**16
10 .text.platform_cpu_warmboot 00000080 [...] 2**3
As can be seen, the *previous* function actually got the alignment
constraint, and it is also 64KB big even though it contains only two
instructions, because the .align directive at the end of its section
forces the assembler to insert a giant sled of NOPs. The function we
actually wanted to align has the default constraint. This code only
works at all because the linker just happens to put the two functions
right behind each other when linking the final image, and since the end
of plat_crash_console_putc is aligned the start of platform_cpu_warmboot
will also be. But it still wastes almost 64KB of image space
unnecessarily, and it will break under certain circumstances (e.g. if
the plat_crash_console_putc function becomes unused and its section gets
garbage-collected out).
There's no real way to fix this with the existing func macro. Code like
func myfunc
.align X
happens to do the right thing, but is still not really correct code
(because the function label is inserted before the .align directive, so
the assembler is technically allowed to insert padding at the beginning
of the function which would then get executed as instructions if the
function was called). Therefore, this patch adds a new parameter with a
default value to the func macro that allows overriding its alignment.
Also fix up all existing instances of this dangerous antipattern.
Change-Id: I5696a07e2fde896f21e0e83644c95b7b6ac79a10
Signed-off-by: Julius Werner <jwerner@chromium.org>
2017-08-01 23:16:36 +01:00
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func tegra186_cpu_reset_handler _align=4
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2016-03-18 20:07:33 +00:00
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/*
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2016-08-08 19:53:14 +01:00
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* The TZRAM loses state during System Suspend. We use this
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* information to decide if the reset handler is running after a
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* System Suspend. Resume from system suspend requires restoring
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* the entire state from TZDRAM to TZRAM.
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2016-03-18 20:07:33 +00:00
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*/
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2016-08-08 19:53:14 +01:00
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mov x0, #BL31_BASE
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ldr x0, [x0]
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cbnz x0, boot_cpu
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2016-03-18 20:07:33 +00:00
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/* resume from system suspend */
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mov x0, #BL31_BASE
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adr x1, __tegra186_cpu_reset_handler_end
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adr x2, __tegra186_cpu_reset_handler_data
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ldr x2, [x2, #8]
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/* memcpy16 */
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m_loop16:
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cmp x2, #16
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b.lt m_loop1
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ldp x3, x4, [x1], #16
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stp x3, x4, [x0], #16
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sub x2, x2, #16
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b m_loop16
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/* copy byte per byte */
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m_loop1:
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cbz x2, boot_cpu
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ldrb w3, [x1], #1
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strb w3, [x0], #1
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subs x2, x2, #1
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b.ne m_loop1
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boot_cpu:
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adr x0, __tegra186_cpu_reset_handler_data
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ldr x0, [x0]
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br x0
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endfunc tegra186_cpu_reset_handler
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/*
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* Tegra186 reset data (offset 0x0 - 0x430)
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*
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* 0x000: secure world's entrypoint
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* 0x008: BL31 size (RO + RW)
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* 0x00C: SMMU context start
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* 0x42C: SMMU context end
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*/
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.align 4
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.type __tegra186_cpu_reset_handler_data, %object
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.globl __tegra186_cpu_reset_handler_data
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__tegra186_cpu_reset_handler_data:
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.quad tegra_secure_entrypoint
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.quad __BL31_END__ - BL31_BASE
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2017-04-21 02:56:09 +01:00
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.globl __tegra186_smmu_context
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__tegra186_smmu_context:
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2016-03-18 20:07:33 +00:00
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.rept TEGRA186_SMMU_CTX_SIZE
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.quad 0
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.endr
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.size __tegra186_cpu_reset_handler_data, \
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. - __tegra186_cpu_reset_handler_data
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.align 4
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.globl __tegra186_cpu_reset_handler_end
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__tegra186_cpu_reset_handler_end:
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