2015-03-19 18:58:55 +00:00
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __PLAT_ARM_H__
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#define __PLAT_ARM_H__
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#include <bakery_lock.h>
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#include <bl_common.h>
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#include <cassert.h>
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#include <cpu_data.h>
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#include <stdint.h>
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/*
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* Extern declarations common to ARM standard platforms
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*/
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extern const mmap_region_t plat_arm_mmap[];
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#define ARM_CASSERT_MMAP \
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CASSERT((ARRAY_SIZE(plat_arm_mmap) + ARM_BL_REGIONS) \
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<= MAX_MMAP_REGIONS, \
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assert_max_mmap_regions);
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/*
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* Utility functions common to ARM standard platforms
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*/
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void arm_configure_mmu_el1(unsigned long total_base,
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unsigned long total_size,
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unsigned long ro_start,
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unsigned long ro_limit
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#if USE_COHERENT_MEM
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, unsigned long coh_start,
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unsigned long coh_limit
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#endif
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);
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void arm_configure_mmu_el3(unsigned long total_base,
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unsigned long total_size,
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unsigned long ro_start,
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unsigned long ro_limit
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#if USE_COHERENT_MEM
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, unsigned long coh_start,
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unsigned long coh_limit
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#endif
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);
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#if IMAGE_BL31
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#if USE_COHERENT_MEM
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/*
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* Use this macro to instantiate lock before it is used in below
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* arm_lock_xxx() macros
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*/
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#define ARM_INSTANTIATE_LOCK bakery_lock_t arm_lock \
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__attribute__ ((section("tzfw_coherent_mem")));
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/*
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* These are wrapper macros to the Coherent Memory Bakery Lock API.
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*/
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#define arm_lock_init() bakery_lock_init(&arm_lock)
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#define arm_lock_get() bakery_lock_get(&arm_lock)
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#define arm_lock_release() bakery_lock_release(&arm_lock)
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#else
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/*******************************************************************************
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* Constants to specify how many bakery locks this platform implements. These
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* are used if the platform chooses not to use coherent memory for bakery lock
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* data structures.
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******************************************************************************/
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#define ARM_MAX_BAKERIES 1
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#define ARM_PWRC_BAKERY_ID 0
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/* Empty definition */
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#define ARM_INSTANTIATE_LOCK
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/*******************************************************************************
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* Definition of structure which holds platform specific per-cpu data. Currently
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* it holds only the bakery lock information for each cpu.
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******************************************************************************/
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typedef struct arm_cpu_data {
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bakery_info_t pcpu_bakery_info[ARM_MAX_BAKERIES];
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} arm_cpu_data_t;
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/* Macro to define the offset of bakery_info_t in arm_cpu_data_t */
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#define ARM_CPU_DATA_LOCK_OFFSET __builtin_offsetof\
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(arm_cpu_data_t, pcpu_bakery_info)
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/*******************************************************************************
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* Helper macros for bakery lock api when using the above arm_cpu_data_t for
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* bakery lock data structures. It assumes that the bakery_info is at the
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* beginning of the platform specific per-cpu data.
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******************************************************************************/
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#define arm_lock_init() /* No init required */
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#define arm_lock_get() bakery_lock_get(ARM_PWRC_BAKERY_ID, \
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CPU_DATA_PLAT_PCPU_OFFSET + \
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ARM_CPU_DATA_LOCK_OFFSET)
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#define arm_lock_release() bakery_lock_release(ARM_PWRC_BAKERY_ID, \
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CPU_DATA_PLAT_PCPU_OFFSET + \
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ARM_CPU_DATA_LOCK_OFFSET)
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/*
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* Ensure that the size of the platform specific per-cpu data structure and
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* the size of the memory allocated in generic per-cpu data for the platform
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* are the same.
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*/
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CASSERT(PLAT_PCPU_DATA_SIZE == sizeof(arm_cpu_data_t),
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arm_pcpu_data_size_mismatch);
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#endif /* USE_COHERENT_MEM */
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#else
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/*
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* Dummy macros for all other BL stages other than BL3-1
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*/
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#define ARM_INSTANTIATE_LOCK
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#define arm_lock_init()
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#define arm_lock_get()
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#define arm_lock_release()
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#endif /* IMAGE_BL31 */
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2015-04-16 14:49:09 +01:00
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#if ARM_RECOM_STATE_ID_ENC
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/*
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* Macros used to parse state information from State-ID if it is using the
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* recommended encoding for State-ID.
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*/
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#define ARM_LOCAL_PSTATE_WIDTH 4
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#define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
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/* Macros to construct the composite power state */
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/* Make composite power state parameter till power level 0 */
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#if PSCI_EXTENDED_STATE_ID
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#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
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(((lvl0_state) << PSTATE_ID_SHIFT) | ((type) << PSTATE_TYPE_SHIFT))
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#else
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#define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \
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(((lvl0_state) << PSTATE_ID_SHIFT) | \
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((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
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((type) << PSTATE_TYPE_SHIFT))
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#endif /* __PSCI_EXTENDED_STATE_ID__ */
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/* Make composite power state parameter till power level 1 */
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#define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \
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(((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
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arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
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#endif /* __ARM_RECOM_STATE_ID_ENC__ */
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2015-03-19 18:58:55 +00:00
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/* CCI utility functions */
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void arm_cci_init(void);
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/* IO storage utility functions */
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void arm_io_setup(void);
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/* Security utility functions */
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void arm_tzc_setup(void);
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/* PM utility functions */
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2015-07-01 16:16:20 +01:00
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int arm_validate_power_state(unsigned int power_state,
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psci_power_state_t *req_state);
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/* Topology utility function */
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int arm_check_mpidr(u_register_t mpidr);
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2015-03-19 18:58:55 +00:00
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/* BL1 utility functions */
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void arm_bl1_early_platform_setup(void);
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void arm_bl1_platform_setup(void);
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void arm_bl1_plat_arch_setup(void);
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/* BL2 utility functions */
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void arm_bl2_early_platform_setup(meminfo_t *mem_layout);
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void arm_bl2_platform_setup(void);
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void arm_bl2_plat_arch_setup(void);
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uint32_t arm_get_spsr_for_bl32_entry(void);
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uint32_t arm_get_spsr_for_bl33_entry(void);
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/* BL3-1 utility functions */
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void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
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void *plat_params_from_bl2);
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void arm_bl31_platform_setup(void);
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void arm_bl31_plat_arch_setup(void);
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/* TSP utility functions */
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void arm_tsp_early_platform_setup(void);
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/*
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* Mandatory functions required in ARM standard platforms
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*/
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void plat_arm_gic_init(void);
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void plat_arm_security_setup(void);
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void plat_arm_pwrc_setup(void);
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/*
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* Optional functions required in ARM standard platforms
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*/
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void plat_arm_io_setup(void);
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int plat_arm_get_alt_image_source(
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2015-04-13 17:36:19 +01:00
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unsigned int image_id,
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uintptr_t *dev_handle,
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uintptr_t *image_spec);
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2015-07-01 16:16:20 +01:00
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unsigned int plat_arm_calc_core_pos(u_register_t mpidr);
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2015-03-19 18:58:55 +00:00
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#endif /* __PLAT_ARM_H__ */
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