82 lines
1.9 KiB
ArmAsm
82 lines
1.9 KiB
ArmAsm
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/*
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* Copyright (c) 2014-2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <cpu_macros.S>
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#include <qemu_max.h>
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func qemu_max_core_pwr_dwn
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/* ---------------------------------------------
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* Disable the Data Cache.
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* ---------------------------------------------
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*/
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mrs x1, sctlr_el3
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bic x1, x1, #SCTLR_C_BIT
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msr sctlr_el3, x1
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isb
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/* ---------------------------------------------
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* Flush L1 cache to L2.
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* ---------------------------------------------
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*/
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mov x18, lr
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mov x0, #DCCISW
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bl dcsw_op_level1
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mov lr, x18
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ret
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endfunc qemu_max_core_pwr_dwn
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func qemu_max_cluster_pwr_dwn
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/* ---------------------------------------------
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* Disable the Data Cache.
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* ---------------------------------------------
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*/
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mrs x1, sctlr_el3
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bic x1, x1, #SCTLR_C_BIT
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msr sctlr_el3, x1
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isb
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/* ---------------------------------------------
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* Flush all caches to PoC.
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* ---------------------------------------------
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*/
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mov x0, #DCCISW
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b dcsw_op_all
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endfunc qemu_max_cluster_pwr_dwn
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#if REPORT_ERRATA
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/*
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* Errata printing function for QEMU "max". Must follow AAPCS.
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*/
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func qemu_max_errata_report
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ret
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endfunc qemu_max_errata_report
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#endif
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/* ---------------------------------------------
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* This function provides cpu specific
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* register information for crash reporting.
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* It needs to return with x6 pointing to
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* a list of register names in ascii and
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* x8 - x15 having values of registers to be
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* reported.
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* ---------------------------------------------
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*/
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.section .rodata.qemu_max_regs, "aS"
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qemu_max_regs: /* The ascii list of register names to be reported */
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.asciz "" /* no registers to report */
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func qemu_max_cpu_reg_dump
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adr x6, qemu_max_regs
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ret
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endfunc qemu_max_cpu_reg_dump
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/* cpu_ops for QEMU MAX */
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declare_cpu_ops qemu_max, QEMU_MAX_MIDR, CPU_NO_RESET_FUNC, \
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qemu_max_core_pwr_dwn, \
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qemu_max_cluster_pwr_dwn
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