2019-01-17 18:16:03 +00:00
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/*
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2021-05-25 17:14:24 +01:00
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* Copyright (c) 2019-2021, Arm Limited and Contributors. All rights reserved.
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2021-04-23 16:12:11 +01:00
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*
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* SPDX-License-Identifier: MIT
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*
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2019-01-17 18:16:03 +00:00
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* This header provides constants for the ARM GIC.
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*/
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#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
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#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
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2021-05-25 17:14:24 +01:00
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#include <dt-bindings/interrupt-controller/irq.h>
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2019-01-17 18:16:03 +00:00
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/* interrupt specifier cell 0 */
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#define GIC_SPI 0
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#define GIC_PPI 1
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2021-04-12 12:49:54 +01:00
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/*
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* Interrupt specifier cell 2.
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2021-05-25 17:14:24 +01:00
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* The flags in irq.h are valid, plus those below.
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2021-04-12 12:49:54 +01:00
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*/
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#define GIC_CPU_MASK_RAW(x) ((x) << 8)
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2021-05-25 17:14:24 +01:00
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#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
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2021-04-12 12:49:54 +01:00
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2019-01-17 18:16:03 +00:00
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#endif
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