315 lines
12 KiB
C
315 lines
12 KiB
C
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch_helpers.h>
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#include <assert.h>
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#include <debug.h>
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#include <mce.h>
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#include <memctrl.h>
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#include <memctrl_v2.h>
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#include <mmio.h>
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#include <string.h>
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#include <tegra_def.h>
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#include <xlat_tables.h>
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/* Video Memory base and size (live values) */
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static uint64_t video_mem_base;
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static uint64_t video_mem_size;
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/* array to hold stream_id override config register offsets */
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const static uint32_t streamid_overrides[] = {
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MC_STREAMID_OVERRIDE_CFG_PTCR,
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MC_STREAMID_OVERRIDE_CFG_AFIR,
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MC_STREAMID_OVERRIDE_CFG_HDAR,
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MC_STREAMID_OVERRIDE_CFG_HOST1XDMAR,
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MC_STREAMID_OVERRIDE_CFG_NVENCSRD,
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MC_STREAMID_OVERRIDE_CFG_SATAR,
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MC_STREAMID_OVERRIDE_CFG_MPCORER,
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MC_STREAMID_OVERRIDE_CFG_NVENCSWR,
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MC_STREAMID_OVERRIDE_CFG_AFIW,
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MC_STREAMID_OVERRIDE_CFG_SATAW,
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MC_STREAMID_OVERRIDE_CFG_MPCOREW,
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MC_STREAMID_OVERRIDE_CFG_SATAW,
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MC_STREAMID_OVERRIDE_CFG_HDAW,
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MC_STREAMID_OVERRIDE_CFG_ISPRA,
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MC_STREAMID_OVERRIDE_CFG_ISPWA,
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MC_STREAMID_OVERRIDE_CFG_ISPWB,
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MC_STREAMID_OVERRIDE_CFG_XUSB_HOSTR,
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MC_STREAMID_OVERRIDE_CFG_XUSB_HOSTW,
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MC_STREAMID_OVERRIDE_CFG_XUSB_DEVR,
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MC_STREAMID_OVERRIDE_CFG_XUSB_DEVW,
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MC_STREAMID_OVERRIDE_CFG_TSECSRD,
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MC_STREAMID_OVERRIDE_CFG_TSECSWR,
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MC_STREAMID_OVERRIDE_CFG_GPUSRD,
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MC_STREAMID_OVERRIDE_CFG_GPUSWR,
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MC_STREAMID_OVERRIDE_CFG_SDMMCRA,
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MC_STREAMID_OVERRIDE_CFG_SDMMCRAA,
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MC_STREAMID_OVERRIDE_CFG_SDMMCR,
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MC_STREAMID_OVERRIDE_CFG_SDMMCRAB,
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MC_STREAMID_OVERRIDE_CFG_SDMMCWA,
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MC_STREAMID_OVERRIDE_CFG_SDMMCWAA,
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MC_STREAMID_OVERRIDE_CFG_SDMMCW,
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MC_STREAMID_OVERRIDE_CFG_SDMMCWAB,
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MC_STREAMID_OVERRIDE_CFG_VICSRD,
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MC_STREAMID_OVERRIDE_CFG_VICSWR,
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MC_STREAMID_OVERRIDE_CFG_VIW,
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MC_STREAMID_OVERRIDE_CFG_NVDECSRD,
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MC_STREAMID_OVERRIDE_CFG_NVDECSWR,
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MC_STREAMID_OVERRIDE_CFG_APER,
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MC_STREAMID_OVERRIDE_CFG_APEW,
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MC_STREAMID_OVERRIDE_CFG_NVJPGSRD,
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MC_STREAMID_OVERRIDE_CFG_NVJPGSWR,
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MC_STREAMID_OVERRIDE_CFG_SESRD,
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MC_STREAMID_OVERRIDE_CFG_SESWR,
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MC_STREAMID_OVERRIDE_CFG_ETRR,
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MC_STREAMID_OVERRIDE_CFG_ETRW,
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MC_STREAMID_OVERRIDE_CFG_TSECSRDB,
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MC_STREAMID_OVERRIDE_CFG_TSECSWRB,
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MC_STREAMID_OVERRIDE_CFG_GPUSRD2,
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MC_STREAMID_OVERRIDE_CFG_GPUSWR2,
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MC_STREAMID_OVERRIDE_CFG_AXISR,
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MC_STREAMID_OVERRIDE_CFG_AXISW,
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MC_STREAMID_OVERRIDE_CFG_EQOSR,
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MC_STREAMID_OVERRIDE_CFG_EQOSW,
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MC_STREAMID_OVERRIDE_CFG_UFSHCR,
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MC_STREAMID_OVERRIDE_CFG_UFSHCW,
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MC_STREAMID_OVERRIDE_CFG_NVDISPLAYR,
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MC_STREAMID_OVERRIDE_CFG_BPMPR,
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MC_STREAMID_OVERRIDE_CFG_BPMPW,
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MC_STREAMID_OVERRIDE_CFG_BPMPDMAR,
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MC_STREAMID_OVERRIDE_CFG_BPMPDMAW,
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MC_STREAMID_OVERRIDE_CFG_AONR,
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MC_STREAMID_OVERRIDE_CFG_AONW,
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MC_STREAMID_OVERRIDE_CFG_AONDMAR,
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MC_STREAMID_OVERRIDE_CFG_AONDMAW,
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MC_STREAMID_OVERRIDE_CFG_SCER,
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MC_STREAMID_OVERRIDE_CFG_SCEW,
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MC_STREAMID_OVERRIDE_CFG_SCEDMAR,
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MC_STREAMID_OVERRIDE_CFG_SCEDMAW,
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MC_STREAMID_OVERRIDE_CFG_APEDMAR,
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MC_STREAMID_OVERRIDE_CFG_APEDMAW,
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MC_STREAMID_OVERRIDE_CFG_NVDISPLAYR1,
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MC_STREAMID_OVERRIDE_CFG_VICSRD1,
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MC_STREAMID_OVERRIDE_CFG_NVDECSRD1
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};
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/* array to hold the security configs for stream IDs */
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const static mc_streamid_security_cfg_t sec_cfgs[] = {
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mc_make_sec_cfg(SCEW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(AFIR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(NVDISPLAYR1, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(XUSB_DEVR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(VICSRD1, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(NVENCSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(TSECSRDB, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(AXISW, SECURE, NO_OVERRIDE, DISABLE),
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mc_make_sec_cfg(SDMMCWAB, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(AONDMAW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(GPUSWR2, SECURE, NO_OVERRIDE, DISABLE),
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mc_make_sec_cfg(SATAW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(UFSHCW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(AFIW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(SDMMCR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(SCEDMAW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(UFSHCR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(SDMMCWAA, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(APEDMAW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(SESWR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(MPCORER, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(PTCR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(BPMPW, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(ETRW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(GPUSRD, SECURE, NO_OVERRIDE, DISABLE),
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mc_make_sec_cfg(VICSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(SCEDMAR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(HDAW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(ISPWA, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(EQOSW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(XUSB_HOSTW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(TSECSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(SDMMCRAA, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(APER, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(VIW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(APEW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(AXISR, SECURE, NO_OVERRIDE, DISABLE),
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mc_make_sec_cfg(SDMMCW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(BPMPDMAW, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(ISPRA, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(NVDECSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(XUSB_DEVW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(NVDECSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(MPCOREW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(NVDISPLAYR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(BPMPDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(NVJPGSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(NVDECSRD1, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(TSECSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(NVJPGSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(SDMMCWA, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(SCER, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(XUSB_HOSTR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(VICSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(AONDMAR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(AONW, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(SDMMCRA, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(HOST1XDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(EQOSR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(SATAR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(BPMPR, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(HDAR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(SDMMCRAB, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(ETRR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(AONR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(APEDMAR, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(SESRD, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(NVENCSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(GPUSWR, SECURE, NO_OVERRIDE, DISABLE),
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mc_make_sec_cfg(TSECSWRB, NON_SECURE, NO_OVERRIDE, ENABLE),
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mc_make_sec_cfg(ISPWB, NON_SECURE, OVERRIDE, ENABLE),
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mc_make_sec_cfg(GPUSRD2, SECURE, NO_OVERRIDE, DISABLE),
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};
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/*
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* Init SMMU.
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*/
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void tegra_memctrl_setup(void)
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{
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uint32_t val;
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uint32_t num_overrides = sizeof(streamid_overrides) / sizeof(uint32_t);
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uint32_t num_sec_cfgs = sizeof(sec_cfgs) / sizeof(mc_streamid_security_cfg_t);
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int i;
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INFO("Tegra Memory Controller (v2)\n");
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/* Program the SMMU pagesize */
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val = tegra_smmu_read_32(ARM_SMMU_GSR0_SECURE_ACR);
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val |= ARM_SMMU_GSR0_PGSIZE_64K;
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tegra_smmu_write_32(ARM_SMMU_GSR0_SECURE_ACR, val);
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/* Program all the Stream ID overrides */
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for (i = 0; i < num_overrides; i++)
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tegra_mc_streamid_write_32(streamid_overrides[i],
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MC_STREAM_ID_MAX);
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/* Program the security config settings for all Stream IDs */
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for (i = 0; i < num_sec_cfgs; i++) {
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val = sec_cfgs[i].override_enable << 16 |
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sec_cfgs[i].override_client_inputs << 8 |
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sec_cfgs[i].override_client_ns_flag << 0;
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tegra_mc_streamid_write_32(sec_cfgs[i].offset, val);
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}
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/*
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* All requests at boot time, and certain requests during
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* normal run time, are physically addressed and must bypass
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* the SMMU. The client hub logic implements a hardware bypass
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* path around the Translation Buffer Units (TBU). During
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* boot-time, the SMMU_BYPASS_CTRL register (which defaults to
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* TBU_BYPASS mode) will be used to steer all requests around
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* the uninitialized TBUs. During normal operation, this register
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* is locked into TBU_BYPASS_SID config, which routes requests
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* with special StreamID 0x7f on the bypass path and all others
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* through the selected TBU. This is done to disable SMMU Bypass
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* mode, as it could be used to circumvent SMMU security checks.
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*/
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tegra_mc_write_32(MC_SMMU_BYPASS_CONFIG,
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MC_SMMU_BYPASS_CONFIG_SETTINGS);
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/* video memory carveout region */
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if (video_mem_base) {
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tegra_mc_write_32(MC_VIDEO_PROTECT_BASE_LO,
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(uint32_t)video_mem_base);
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tegra_mc_write_32(MC_VIDEO_PROTECT_BASE_HI,
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(uint32_t)(video_mem_base >> 32));
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tegra_mc_write_32(MC_VIDEO_PROTECT_SIZE_MB, video_mem_size);
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/*
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* MCE propogates the VideoMem configuration values across the
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* CCPLEX.
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*/
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mce_update_gsc_videomem();
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}
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}
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/*
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* Secure the BL31 DRAM aperture.
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*
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* phys_base = physical base of TZDRAM aperture
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* size_in_bytes = size of aperture in bytes
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*/
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void tegra_memctrl_tzdram_setup(uint64_t phys_base, uint32_t size_in_bytes)
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{
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/*
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* Setup the Memory controller to allow only secure accesses to
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* the TZDRAM carveout
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*/
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INFO("Configuring TrustZone DRAM Memory Carveout\n");
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tegra_mc_write_32(MC_SECURITY_CFG0_0, (uint32_t)phys_base);
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tegra_mc_write_32(MC_SECURITY_CFG3_0, (uint32_t)(phys_base >> 32));
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||
|
|
tegra_mc_write_32(MC_SECURITY_CFG1_0, size_in_bytes >> 20);
|
||
|
|
|
||
|
|
/*
|
||
|
|
* MCE propogates the security configuration values across the
|
||
|
|
* CCPLEX.
|
||
|
|
*/
|
||
|
|
mce_update_gsc_tzdram();
|
||
|
|
}
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Program the Video Memory carveout region
|
||
|
|
*
|
||
|
|
* phys_base = physical base of aperture
|
||
|
|
* size_in_bytes = size of aperture in bytes
|
||
|
|
*/
|
||
|
|
void tegra_memctrl_videomem_setup(uint64_t phys_base, uint32_t size_in_bytes)
|
||
|
|
{
|
||
|
|
/*
|
||
|
|
* Setup the Memory controller to restrict CPU accesses to the Video
|
||
|
|
* Memory region
|
||
|
|
*/
|
||
|
|
INFO("Configuring Video Memory Carveout\n");
|
||
|
|
|
||
|
|
tegra_mc_write_32(MC_VIDEO_PROTECT_BASE_LO, (uint32_t)phys_base);
|
||
|
|
tegra_mc_write_32(MC_VIDEO_PROTECT_BASE_HI,
|
||
|
|
(uint32_t)(phys_base >> 32));
|
||
|
|
tegra_mc_write_32(MC_VIDEO_PROTECT_SIZE_MB, size_in_bytes);
|
||
|
|
|
||
|
|
/* store new values */
|
||
|
|
video_mem_base = phys_base;
|
||
|
|
video_mem_size = size_in_bytes >> 20;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* MCE propogates the VideoMem configuration values across the
|
||
|
|
* CCPLEX.
|
||
|
|
*/
|
||
|
|
mce_update_gsc_videomem();
|
||
|
|
}
|