2013-10-25 09:08:21 +01:00
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/*
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2018-02-12 12:36:17 +00:00
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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2013-10-25 09:08:21 +01:00
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*
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2017-05-03 09:38:09 +01:00
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* SPDX-License-Identifier: BSD-3-Clause
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2013-10-25 09:08:21 +01:00
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*/
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2018-10-05 13:30:59 +01:00
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#ifndef FVP_PWRC_H
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#define FVP_PWRC_H
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2013-10-25 09:08:21 +01:00
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/* FVP Power controller register offset etc */
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2018-10-05 13:30:59 +01:00
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#define PPOFFR_OFF U(0x0)
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#define PPONR_OFF U(0x4)
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#define PCOFFR_OFF U(0x8)
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#define PWKUPR_OFF U(0xc)
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#define PSYSR_OFF U(0x10)
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2013-10-25 09:08:21 +01:00
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2018-10-05 13:30:59 +01:00
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#define PWKUPR_WEN BIT_32(31)
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2013-10-25 09:08:21 +01:00
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2018-10-05 13:30:59 +01:00
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#define PSYSR_AFF_L2 BIT_32(31)
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#define PSYSR_AFF_L1 BIT_32(30)
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#define PSYSR_AFF_L0 BIT_32(29)
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#define PSYSR_WEN BIT_32(28)
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#define PSYSR_PC BIT_32(27)
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#define PSYSR_PP BIT_32(26)
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2013-10-25 09:08:21 +01:00
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#define PSYSR_WK_SHIFT 24
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2015-04-30 12:27:41 +01:00
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#define PSYSR_WK_WIDTH 0x2
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2018-10-05 13:30:59 +01:00
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#define PSYSR_WK_MASK ((1U << PSYSR_WK_WIDTH) - 1U)
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#define PSYSR_WK(x) ((x) >> PSYSR_WK_SHIFT) & PSYSR_WK_MASK
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2013-10-25 09:08:21 +01:00
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2018-10-05 13:30:59 +01:00
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#define WKUP_COLD U(0x0)
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#define WKUP_RESET U(0x1)
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#define WKUP_PPONR U(0x2)
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#define WKUP_GICREQ U(0x3)
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2013-10-25 09:08:21 +01:00
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2018-10-05 13:30:59 +01:00
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#define PSYSR_INVALID U(0xffffffff)
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2013-10-25 09:08:21 +01:00
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2019-07-09 21:49:11 +01:00
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#ifndef __ASSEMBLER__
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2013-10-25 09:08:21 +01:00
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2019-01-23 21:50:09 +00:00
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#include <stdint.h>
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2013-10-25 09:08:21 +01:00
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/*******************************************************************************
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* Function & variable prototypes
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******************************************************************************/
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2018-02-12 12:36:17 +00:00
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void fvp_pwrc_write_pcoffr(u_register_t mpidr);
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void fvp_pwrc_write_ppoffr(u_register_t mpidr);
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void fvp_pwrc_write_pponr(u_register_t mpidr);
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void fvp_pwrc_set_wen(u_register_t mpidr);
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void fvp_pwrc_clr_wen(u_register_t mpidr);
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unsigned int fvp_pwrc_read_psysr(u_register_t mpidr);
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unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr);
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2013-10-25 09:08:21 +01:00
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2019-07-09 21:49:11 +01:00
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#endif /*__ASSEMBLER__*/
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2013-10-25 09:08:21 +01:00
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2018-10-05 13:30:59 +01:00
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#endif /* FVP_PWRC_H */
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