120 lines
3.9 KiB
C
120 lines
3.9 KiB
C
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __V2M_DEF_H__
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#define __V2M_DEF_H__
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#include <xlat_tables.h>
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/* V2M motherboard system registers & offsets */
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#define V2M_SYSREGS_BASE 0x1c010000
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#define V2M_SYS_ID 0x0
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#define V2M_SYS_SWITCH 0x4
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#define V2M_SYS_LED 0x8
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#define V2M_SYS_CFGDATA 0xa0
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#define V2M_SYS_CFGCTRL 0xa4
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#define V2M_SYS_CFGSTATUS 0xa8
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#define V2M_CFGCTRL_START (1 << 31)
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#define V2M_CFGCTRL_RW (1 << 30)
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#define V2M_CFGCTRL_FUNC_SHIFT 20
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#define V2M_CFGCTRL_FUNC(fn) (fn << V2M_CFGCTRL_FUNC_SHIFT)
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#define V2M_FUNC_CLK_GEN 0x01
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#define V2M_FUNC_TEMP 0x04
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#define V2M_FUNC_DB_RESET 0x05
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#define V2M_FUNC_SCC_CFG 0x06
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#define V2M_FUNC_SHUTDOWN 0x08
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#define V2M_FUNC_REBOOT 0x09
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/*
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* V2M sysled bit definitions. The values written to this
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* register are defined in arch.h & runtime_svc.h. Only
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* used by the primary cpu to diagnose any cold boot issues.
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*
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* SYS_LED[0] - Security state (S=0/NS=1)
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* SYS_LED[2:1] - Exception Level (EL3-EL0)
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* SYS_LED[7:3] - Exception Class (Sync/Async & origin)
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*
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*/
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#define V2M_SYS_LED_SS_SHIFT 0x0
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#define V2M_SYS_LED_EL_SHIFT 0x1
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#define V2M_SYS_LED_EC_SHIFT 0x3
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#define V2M_SYS_LED_SS_MASK 0x1
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#define V2M_SYS_LED_EL_MASK 0x3
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#define V2M_SYS_LED_EC_MASK 0x1f
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/* V2M sysid register bits */
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#define V2M_SYS_ID_REV_SHIFT 28
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#define V2M_SYS_ID_HBI_SHIFT 16
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#define V2M_SYS_ID_BLD_SHIFT 12
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#define V2M_SYS_ID_ARCH_SHIFT 8
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#define V2M_SYS_ID_FPGA_SHIFT 0
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#define V2M_SYS_ID_REV_MASK 0xf
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#define V2M_SYS_ID_HBI_MASK 0xfff
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#define V2M_SYS_ID_BLD_MASK 0xf
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#define V2M_SYS_ID_ARCH_MASK 0xf
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#define V2M_SYS_ID_FPGA_MASK 0xff
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#define V2M_SYS_ID_BLD_LENGTH 4
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/* NOR Flash */
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#define V2M_FLASH0_BASE 0x08000000
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#define V2M_FLASH0_SIZE 0x04000000
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#define V2M_IOFPGA_BASE 0x1c000000
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#define V2M_IOFPGA_SIZE 0x03000000
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/* PL011 UART related constants */
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#define V2M_IOFPGA_UART0_BASE 0x1c090000
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#define V2M_IOFPGA_UART1_BASE 0x1c0a0000
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#define V2M_IOFPGA_UART2_BASE 0x1c0b0000
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#define V2M_IOFPGA_UART3_BASE 0x1c0c0000
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#define V2M_IOFPGA_UART0_CLK_IN_HZ 24000000
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#define V2M_IOFPGA_UART1_CLK_IN_HZ 24000000
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#define V2M_IOFPGA_UART2_CLK_IN_HZ 24000000
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#define V2M_IOFPGA_UART3_CLK_IN_HZ 24000000
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#define V2M_MAP_FLASH0 MAP_REGION_FLAT(V2M_FLASH0_BASE,\
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V2M_FLASH0_SIZE, \
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MT_MEMORY | MT_RO | MT_SECURE)
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#define V2M_MAP_IOFPGA MAP_REGION_FLAT(V2M_IOFPGA_BASE,\
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V2M_IOFPGA_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#endif /* __V2M_DEF_H__ */
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