95 lines
2.3 KiB
ArmAsm
95 lines
2.3 KiB
ArmAsm
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/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <bl_common.h>
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#include <platform_def.h>
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.globl platform_mem_init
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.globl plat_report_exception
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.globl plat_get_my_entrypoint
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.globl plat_secondary_cold_boot_setup
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.globl plat_reset_handler
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.globl plat_is_my_cpu_primary
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.globl plat_my_core_pos
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.globl plat_panic_handler
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func platform_mem_init
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/* Nothing to do, don't need to init SYSRAM */
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bx lr
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endfunc platform_mem_init
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func plat_report_exception
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bx lr
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endfunc plat_report_exception
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func plat_reset_handler
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bx lr
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endfunc plat_reset_handler
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/* ------------------------------------------------------------------
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* unsigned long plat_get_my_entrypoint (void);
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*
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* Main job of this routine is to distinguish between a cold and warm
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* boot.
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*
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* Currently supports only cold boot
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* ------------------------------------------------------------------
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*/
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func plat_get_my_entrypoint
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mov r0, #0
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bx lr
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endfunc plat_get_my_entrypoint
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/* ---------------------------------------------
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* void plat_secondary_cold_boot_setup (void);
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*
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* Cold-booting secondary CPUs is not supported.
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* ---------------------------------------------
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*/
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func plat_secondary_cold_boot_setup
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b .
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endfunc plat_secondary_cold_boot_setup
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/* -----------------------------------------------------
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* unsigned int plat_is_my_cpu_primary (void);
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*
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* Find out whether the current cpu is the primary cpu.
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* -----------------------------------------------------
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*/
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func plat_is_my_cpu_primary
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ldcopr r0, MPIDR
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ldr r1, =(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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and r0, r1
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cmp r0, #STM32MP1_PRIMARY_CPU
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moveq r0, #1
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movne r0, #0
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bx lr
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endfunc plat_is_my_cpu_primary
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/* -------------------------------------------
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* int plat_stm32mp1_get_core_pos(int mpidr);
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*
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* Return CorePos = (ClusterId * 4) + CoreId
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* -------------------------------------------
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*/
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func plat_stm32mp1_get_core_pos
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and r1, r0, #MPIDR_CPU_MASK
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and r0, r0, #MPIDR_CLUSTER_MASK
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add r0, r1, r0, LSR #6
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bx lr
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endfunc plat_stm32mp1_get_core_pos
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/* ------------------------------------
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* unsigned int plat_my_core_pos(void)
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* ------------------------------------
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*/
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func plat_my_core_pos
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ldcopr r0, MPIDR
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b plat_stm32mp1_get_core_pos
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endfunc plat_my_core_pos
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