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arm-trusted-firmware/lib/extensions/pauth/pauth_helpers.S

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Refactor ARMv8.3 Pointer Authentication support code This patch provides the following features and makes modifications listed below: - Individual APIAKey key generation for each CPU. - New key generation on every BL31 warm boot and TSP CPU On event. - Per-CPU storage of APIAKey added in percpu_data[] of cpu_data structure. - `plat_init_apiakey()` function replaced with `plat_init_apkey()` which returns 128-bit value and uses Generic timer physical counter value to increase the randomness of the generated key. The new function can be used for generation of all ARMv8.3-PAuth keys - ARMv8.3-PAuth specific code placed in `lib\extensions\pauth`. - New `pauth_init_enable_el1()` and `pauth_init_enable_el3()` functions generate, program and enable APIAKey_EL1 for EL1 and EL3 respectively; pauth_disable_el1()` and `pauth_disable_el3()` functions disable PAuth for EL1 and EL3 respectively; `pauth_load_bl31_apiakey()` loads saved per-CPU APIAKey_EL1 from cpu-data structure. - Combined `save_gp_pauth_registers()` function replaces calls to `save_gp_registers()` and `pauth_context_save()`; `restore_gp_pauth_registers()` replaces `pauth_context_restore()` and `restore_gp_registers()` calls. - `restore_gp_registers_eret()` function removed with corresponding code placed in `el3_exit()`. - Fixed the issue when `pauth_t pauth_ctx` structure allocated space for 12 uint64_t PAuth registers instead of 10 by removal of macro CTX_PACGAKEY_END from `include/lib/el3_runtime/aarch64/context.h` and assigning its value to CTX_PAUTH_REGS_END. - Use of MODE_SP_ELX and MODE_SP_EL0 macro definitions in `msr spsel` instruction instead of hard-coded values. - Changes in documentation related to ARMv8.3-PAuth and ARMv8.5-BTI. Change-Id: Id18b81cc46f52a783a7e6a09b9f149b6ce803211 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2019-09-13 14:11:59 +01:00
/*
* Copyright (c) 2019, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch.h>
#include <asm_macros.S>
#include <lib/el3_runtime/cpu_data.h>
.global pauth_init_enable_el1
.global pauth_disable_el1
.global pauth_init_enable_el3
.global pauth_disable_el3
.globl pauth_load_bl31_apiakey
/* -------------------------------------------------------------
* Program APIAKey_EL1 and enable pointer authentication in EL1
* -------------------------------------------------------------
*/
func pauth_init_enable_el1
stp x29, x30, [sp, #-16]!
/* Initialize platform key */
bl plat_init_apkey
/* Program instruction key A used by the Trusted Firmware */
msr APIAKeyLo_EL1, x0
msr APIAKeyHi_EL1, x1
/* Enable pointer authentication */
mrs x0, sctlr_el1
orr x0, x0, #SCTLR_EnIA_BIT
#if ENABLE_BTI
/* Enable PAC branch type compatibility */
bic x0, x0, #(SCTLR_BT0_BIT | SCTLR_BT1_BIT)
#endif
msr sctlr_el1, x0
isb
ldp x29, x30, [sp], #16
ret
endfunc pauth_init_enable_el1
/* -------------------------------------------------------------
* Disable pointer authentication in EL3
* -------------------------------------------------------------
*/
func pauth_disable_el1
mrs x0, sctlr_el1
bic x0, x0, #SCTLR_EnIA_BIT
msr sctlr_el1, x0
isb
ret
endfunc pauth_disable_el1
/* -------------------------------------------------------------
* Program APIAKey_EL1 and enable pointer authentication in EL3
* -------------------------------------------------------------
*/
func pauth_init_enable_el3
stp x29, x30, [sp, #-16]!
/* Initialize platform key */
bl plat_init_apkey
/* Program instruction key A used by the Trusted Firmware */
msr APIAKeyLo_EL1, x0
msr APIAKeyHi_EL1, x1
/* Enable pointer authentication */
mrs x0, sctlr_el3
orr x0, x0, #SCTLR_EnIA_BIT
#if ENABLE_BTI
/* Enable PAC branch type compatibility */
bic x0, x0, #SCTLR_BT_BIT
#endif
msr sctlr_el3, x0
isb
ldp x29, x30, [sp], #16
ret
endfunc pauth_init_enable_el3
/* -------------------------------------------------------------
* Disable pointer authentication in EL3
* -------------------------------------------------------------
*/
func pauth_disable_el3
mrs x0, sctlr_el3
bic x0, x0, #SCTLR_EnIA_BIT
msr sctlr_el3, x0
isb
ret
endfunc pauth_disable_el3
/* -------------------------------------------------------------
* The following function strictly follows the AArch64 PCS
* to use x9-x17 (temporary caller-saved registers) to load
* the APIAKey_EL1 used by the firmware.
* -------------------------------------------------------------
*/
func pauth_load_bl31_apiakey
/* tpidr_el3 contains the address of cpu_data structure */
mrs x9, tpidr_el3
/* Load apiakey from cpu_data */
ldp x10, x11, [x9, #CPU_DATA_APIAKEY_OFFSET]
/* Program instruction key A */
msr APIAKeyLo_EL1, x10
msr APIAKeyHi_EL1, x11
isb
ret
endfunc pauth_load_bl31_apiakey