docs: Reorder build options alphabetically
At present, build options in the user guide aren't listed in any specific order. Ordering them alphabetically is a standard practice, and is also easier on the reader. Contents unchanged. Change-Id: Ibc36f3a2a576edb86c1a402430d2ef5adcb2f144 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
This commit is contained in:
Jeenu Viswambharan
parent
d19ce2cb44
commit
01920cfdf9
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@ -168,142 +168,131 @@ performed.
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#### Common build options
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#### Common build options
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* `SCP_BL2`: Path to SCP_BL2 image in the host file system. This image is optional.
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If a SCP_BL2 image is present then this option must be passed for the `fip`
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target.
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* `BL33`: Path to BL33 image in the host file system. This is mandatory for
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`fip` target in case the BL2 from ARM Trusted Firmware is used.
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* `BL2`: This is an optional build option which specifies the path to BL2
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image for the `fip` target. In this case, the BL2 in the ARM Trusted
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Firmware will not be built.
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* `BL31`: This is an optional build option which specifies the path to
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BL31 image for the `fip` target. In this case, the BL31 in the ARM
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Trusted Firmware will not be built.
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* `BL32`: This is an optional build option which specifies the path to
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BL32 image for the `fip` target. In this case, the BL32 in the ARM
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Trusted Firmware will not be built.
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* `FIP_NAME`: This is an optional build option which specifies the FIP
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filename for the `fip` target. Default is `fip.bin`.
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* `FWU_FIP_NAME`: This is an optional build option which specifies the FWU
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FIP filename for the `fwu_fip` target. Default is `fwu_fip.bin`.
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* `BL2U`: This is an optional build option which specifies the path to
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BL2U image. In this case, the BL2U in the ARM Trusted Firmware will not
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be built.
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* `SCP_BL2U`: Path to SCP_BL2U image in the host file system. This image is
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optional. It is only needed if the platform makefile specifies that it
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is required in order to build the `fwu_fip` target.
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* `NS_BL2U`: Path to NS_BL2U image in the host file system. This image is
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optional. It is only needed if the platform makefile specifies that it
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is required in order to build the `fwu_fip` target.
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* `DEBUG`: Chooses between a debug and release build. It can take either 0
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(release) or 1 (debug) as values. 0 is the default.
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* `LOG_LEVEL`: Chooses the log level, which controls the amount of console log
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output compiled into the build. This should be one of the following:
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0 (LOG_LEVEL_NONE)
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10 (LOG_LEVEL_NOTICE)
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20 (LOG_LEVEL_ERROR)
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30 (LOG_LEVEL_WARNING)
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40 (LOG_LEVEL_INFO)
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50 (LOG_LEVEL_VERBOSE)
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All log output up to and including the log level is compiled into the build.
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The default value is 40 in debug builds and 20 in release builds.
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* `NS_TIMER_SWITCH`: Enable save and restore for non-secure timer register
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contents upon world switch. It can take either 0 (don't save and restore) or
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1 (do save and restore). 0 is the default. An SPD may set this to 1 if it
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wants the timer registers to be saved and restored.
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* `PLAT`: Choose a platform to build ARM Trusted Firmware for. The chosen
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platform name must be subdirectory of any depth under `plat/`, and must
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contain a platform makefile named `platform.mk`.
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* `ARCH` : Choose the target build architecture for ARM Trusted Firmware.
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It can take either `aarch64` or `aarch32` as values. By default, it is
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defined to `aarch64`.
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* `SPD`: Choose a Secure Payload Dispatcher component to be built into the
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Trusted Firmware. This build option is only valid if `ARCH=aarch64`. The
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value should be the path to the directory containing the SPD source,
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relative to `services/spd/`; the directory is expected to
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contain a makefile called `<spd-value>.mk`.
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* `AARCH32_SP` : Choose the AArch32 Secure Payload component to be built as
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* `AARCH32_SP` : Choose the AArch32 Secure Payload component to be built as
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as the BL32 image when `ARCH=aarch32`. The value should be the path to the
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as the BL32 image when `ARCH=aarch32`. The value should be the path to the
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directory containing the SP source, relative to the `bl32/`; the directory
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directory containing the SP source, relative to the `bl32/`; the directory
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is expected to contain a makefile called `<aarch32_sp-value>.mk`.
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is expected to contain a makefile called `<aarch32_sp-value>.mk`.
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* `V`: Verbose build. If assigned anything other than 0, the build commands
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* `ARCH` : Choose the target build architecture for ARM Trusted Firmware.
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are printed. Default is 0.
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It can take either `aarch64` or `aarch32` as values. By default, it is
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defined to `aarch64`.
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* `ARM_CCI_PRODUCT_ID`: Choice of ARM CCI product used by the platform. This
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is used to determine the number of valid slave interfaces available in the
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ARM CCI driver. Default is 400 (that is, CCI-400).
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* `ARM_GIC_ARCH`: Choice of ARM GIC architecture version used by the ARM
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* `ARM_GIC_ARCH`: Choice of ARM GIC architecture version used by the ARM
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Legacy GIC driver for implementing the platform GIC API. This API is used
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Legacy GIC driver for implementing the platform GIC API. This API is used
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by the interrupt management framework. Default is 2 (that is, version 2.0).
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by the interrupt management framework. Default is 2 (that is, version 2.0).
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This build option is deprecated.
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This build option is deprecated.
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* `ARM_CCI_PRODUCT_ID`: Choice of ARM CCI product used by the platform. This
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* `ASM_ASSERTION`: This flag determines whether the assertion checks within
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is used to determine the number of valid slave interfaces available in the
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assembly source files are enabled or not. This option defaults to the
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ARM CCI driver. Default is 400 (that is, CCI-400).
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value of `DEBUG` - that is, by default this is only enabled for a debug
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build of the firmware.
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* `RESET_TO_BL31`: Enable BL31 entrypoint as the CPU reset vector instead
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* `BL2`: This is an optional build option which specifies the path to BL2
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of the BL1 entrypoint. It can take the value 0 (CPU reset to BL1
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image for the `fip` target. In this case, the BL2 in the ARM Trusted
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entrypoint) or 1 (CPU reset to BL31 entrypoint).
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Firmware will not be built.
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The default value is 0.
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* `RESET_TO_SP_MIN`: SP_MIN is the minimal AArch32 Secure Payload provided in
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* `BL2U`: This is an optional build option which specifies the path to
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ARM Trusted Firmware. This flag configures SP_MIN entrypoint as the CPU
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BL2U image. In this case, the BL2U in the ARM Trusted Firmware will not
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reset vector instead of the BL1 entrypoint. It can take the value 0 (CPU
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be built.
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reset to BL1 entrypoint) or 1 (CPU reset to SP_MIN entrypoint). The default
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value is 0.
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* `BL31`: This is an optional build option which specifies the path to
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BL31 image for the `fip` target. In this case, the BL31 in the ARM
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Trusted Firmware will not be built.
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* `BL31_KEY`: This option is used when `GENERATE_COT=1`. It specifies the
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file that contains the BL31 private key in PEM format. If `SAVE_KEYS=1`,
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this file name will be used to save the key.
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* `BL32`: This is an optional build option which specifies the path to
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BL32 image for the `fip` target. In this case, the BL32 in the ARM
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Trusted Firmware will not be built.
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* `BL32_KEY`: This option is used when `GENERATE_COT=1`. It specifies the
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file that contains the BL32 private key in PEM format. If `SAVE_KEYS=1`,
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this file name will be used to save the key.
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* `BL33`: Path to BL33 image in the host file system. This is mandatory for
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`fip` target in case the BL2 from ARM Trusted Firmware is used.
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* `BL33_KEY`: This option is used when `GENERATE_COT=1`. It specifies the
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file that contains the BL33 private key in PEM format. If `SAVE_KEYS=1`,
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this file name will be used to save the key.
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* `BUILD_MESSAGE_TIMESTAMP`: String used to identify the time and date of the
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compilation of each build. It must be set to a C string (including quotes
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where applicable). Defaults to a string that contains the time and date of
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the compilation.
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* `BUILD_STRING`: Input string for VERSION_STRING, which allows the TF build
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to be uniquely identified. Defaults to the current git commit id.
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* `COLD_BOOT_SINGLE_CPU`: This option indicates whether the platform may
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release several CPUs out of reset. It can take either 0 (several CPUs may be
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brought up) or 1 (only one CPU will ever be brought up during cold reset).
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Default is 0. If the platform always brings up a single CPU, there is no
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need to distinguish between primary and secondary CPUs and the boot path can
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be optimised. The `plat_is_my_cpu_primary()` and
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`plat_secondary_cold_boot_setup()` platform porting interfaces do not need
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to be implemented in this case.
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* `CRASH_REPORTING`: A non-zero value enables a console dump of processor
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* `CRASH_REPORTING`: A non-zero value enables a console dump of processor
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register state when an unexpected exception occurs during execution of
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register state when an unexpected exception occurs during execution of
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BL31. This option defaults to the value of `DEBUG` - i.e. by default
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BL31. This option defaults to the value of `DEBUG` - i.e. by default
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this is only enabled for a debug build of the firmware.
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this is only enabled for a debug build of the firmware.
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* `ASM_ASSERTION`: This flag determines whether the assertion checks within
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* `CREATE_KEYS`: This option is used when `GENERATE_COT=1`. It tells the
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assembly source files are enabled or not. This option defaults to the
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certificate generation tool to create new keys in case no valid keys are
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value of `DEBUG` - that is, by default this is only enabled for a debug
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present or specified. Allowed options are '0' or '1'. Default is '1'.
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build of the firmware.
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* `TSP_INIT_ASYNC`: Choose BL32 initialization method as asynchronous or
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* `CTX_INCLUDE_AARCH32_REGS` : Boolean option that, when set to 1, will cause
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synchronous, (see "Initializing a BL32 Image" section in [Firmware
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the AArch32 system registers to be included when saving and restoring the
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Design]). It can take the value 0 (BL32 is initialized using
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CPU context. The option must be set to 0 for AArch64-only platforms (that
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synchronous method) or 1 (BL32 is initialized using asynchronous method).
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is on hardware that does not implement AArch32, or at least not at EL1 and
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Default is 0.
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higher ELs). Default value is 1.
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* `USE_COHERENT_MEM`: This flag determines whether to include the coherent
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* `CTX_INCLUDE_FPREGS`: Boolean option that, when set to 1, will cause the FP
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memory region in the BL memory map or not (see "Use of Coherent memory in
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registers to be included when saving and restoring the CPU context. Default
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Trusted Firmware" section in [Firmware Design]). It can take the value 1
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is 0.
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(Coherent memory region is included) or 0 (Coherent memory region is
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excluded). Default is 1.
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* `TSP_NS_INTR_ASYNC_PREEMPT`: A non zero value enables the interrupt
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* `DEBUG`: Chooses between a debug and release build. It can take either 0
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routing model which routes non-secure interrupts asynchronously from TSP
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(release) or 1 (debug) as values. 0 is the default.
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to EL3 causing immediate preemption of TSP. The EL3 is responsible
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for saving and restoring the TSP context in this routing model. The
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default routing model (when the value is 0) is to route non-secure
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interrupts to TSP allowing it to save its context and hand over
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synchronously to EL3 via an SMC.
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* `TRUSTED_BOARD_BOOT`: Boolean flag to include support for the Trusted Board
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* `DISABLE_PEDANTIC`: When set to 1 it will disable the -pedantic option in
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Boot feature. When set to '1', BL1 and BL2 images include support to load
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the GCC command line. Default is 0.
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and verify the certificates and images in a FIP, and BL1 includes support
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for the Firmware Update. The default value is '0'. Generation and inclusion
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* `EL3_PAYLOAD_BASE`: This option enables booting an EL3 payload instead of
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of certificates in the FIP and FWU_FIP depends upon the value of the
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the normal boot flow. It must specify the entry point address of the EL3
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`GENERATE_COT` option.
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payload. Please refer to the "Booting an EL3 payload" section for more
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details.
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* `ENABLE_PMF`: Boolean option to enable support for optional Performance
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Measurement Framework(PMF). Default is 0.
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* `ENABLE_PSCI_STAT`: Boolean option to enable support for optional PSCI
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functions `PSCI_STAT_RESIDENCY` and `PSCI_STAT_COUNT`. Default is 0.
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Enabling this option enables the `ENABLE_PMF` build option as well.
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The PMF is used for collecting the statistics.
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* `ENABLE_RUNTIME_INSTRUMENTATION`: Boolean option to enable runtime
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instrumentation which injects timestamp collection points into
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Trusted Firmware to allow runtime performance to be measured.
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Currently, only PSCI is instrumented. Enabling this option enables
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the `ENABLE_PMF` build option as well. Default is 0.
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* `ERROR_DEPRECATED`: This option decides whether to treat the usage of
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deprecated platform APIs, helper functions or drivers within Trusted
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Firmware as error. It can take the value 1 (flag the use of deprecated
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APIs as error) or 0. The default is 0.
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* `FIP_NAME`: This is an optional build option which specifies the FIP
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filename for the `fip` target. Default is `fip.bin`.
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* `FWU_FIP_NAME`: This is an optional build option which specifies the FWU
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FIP filename for the `fwu_fip` target. Default is `fwu_fip.bin`.
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* `GENERATE_COT`: Boolean flag used to build and execute the `cert_create`
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* `GENERATE_COT`: Boolean flag used to build and execute the `cert_create`
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tool to create certificates as per the Chain of Trust described in
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tool to create certificates as per the Chain of Trust described in
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@ -324,44 +313,56 @@ performed.
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images will include support for Trusted Board Boot, but the FIP and FWU_FIP
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images will include support for Trusted Board Boot, but the FIP and FWU_FIP
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will not include the corresponding certificates, causing a boot failure.
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will not include the corresponding certificates, causing a boot failure.
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* `CREATE_KEYS`: This option is used when `GENERATE_COT=1`. It tells the
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* `HANDLE_EA_EL3_FIRST`: When defined External Aborts and SError Interrupts
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certificate generation tool to create new keys in case no valid keys are
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will be always trapped in EL3 i.e. in BL31 at runtime.
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present or specified. Allowed options are '0' or '1'. Default is '1'.
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* `SAVE_KEYS`: This option is used when `GENERATE_COT=1`. It tells the
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* `LOAD_IMAGE_V2`: Boolean option to enable support for new version (v2) of
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certificate generation tool to save the keys used to establish the Chain of
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image loading, which provides more flexibility and scalability around what
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Trust. Allowed options are '0' or '1'. Default is '0' (do not save).
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images are loaded and executed during boot. Default is 0.
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Note: `TRUSTED_BOARD_BOOT` is currently not supported when `LOAD_IMAGE_V2`
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is enabled.
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Note: This option depends on 'CREATE_KEYS' to be enabled. If the keys
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* `LOG_LEVEL`: Chooses the log level, which controls the amount of console log
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already exist in disk, they will be overwritten without further notice.
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output compiled into the build. This should be one of the following:
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* `ROT_KEY`: This option is used when `GENERATE_COT=1`. It specifies the
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0 (LOG_LEVEL_NONE)
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file that contains the ROT private key in PEM format. If `SAVE_KEYS=1`, this
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10 (LOG_LEVEL_NOTICE)
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file name will be used to save the key.
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20 (LOG_LEVEL_ERROR)
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30 (LOG_LEVEL_WARNING)
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40 (LOG_LEVEL_INFO)
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50 (LOG_LEVEL_VERBOSE)
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* `TRUSTED_WORLD_KEY`: This option is used when `GENERATE_COT=1`. It
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All log output up to and including the log level is compiled into the build.
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specifies the file that contains the Trusted World private key in PEM
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The default value is 40 in debug builds and 20 in release builds.
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format. If `SAVE_KEYS=1`, this file name will be used to save the key.
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* `NON_TRUSTED_WORLD_KEY`: This option is used when `GENERATE_COT=1`. It
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* `NON_TRUSTED_WORLD_KEY`: This option is used when `GENERATE_COT=1`. It
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specifies the file that contains the Non-Trusted World private key in PEM
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specifies the file that contains the Non-Trusted World private key in PEM
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format. If `SAVE_KEYS=1`, this file name will be used to save the key.
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format. If `SAVE_KEYS=1`, this file name will be used to save the key.
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* `SCP_BL2_KEY`: This option is used when `GENERATE_COT=1`. It specifies the
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* `NS_BL2U`: Path to NS_BL2U image in the host file system. This image is
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file that contains the SCP_BL2 private key in PEM format. If `SAVE_KEYS=1`,
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optional. It is only needed if the platform makefile specifies that it
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this file name will be used to save the key.
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is required in order to build the `fwu_fip` target.
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* `BL31_KEY`: This option is used when `GENERATE_COT=1`. It specifies the
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* `NS_TIMER_SWITCH`: Enable save and restore for non-secure timer register
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file that contains the BL31 private key in PEM format. If `SAVE_KEYS=1`,
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contents upon world switch. It can take either 0 (don't save and restore) or
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this file name will be used to save the key.
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1 (do save and restore). 0 is the default. An SPD may set this to 1 if it
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wants the timer registers to be saved and restored.
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* `BL32_KEY`: This option is used when `GENERATE_COT=1`. It specifies the
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* `PL011_GENERIC_UART`: Boolean option to indicate the PL011 driver that
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file that contains the BL32 private key in PEM format. If `SAVE_KEYS=1`,
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the underlying hardware is not a full PL011 UART but a minimally compliant
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this file name will be used to save the key.
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generic UART, which is a subset of the PL011. The driver will not access
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any register that is not part of the SBSA generic UART specification.
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Default value is 0 (a full PL011 compliant UART is present).
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* `BL33_KEY`: This option is used when `GENERATE_COT=1`. It specifies the
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* `PLAT`: Choose a platform to build ARM Trusted Firmware for. The chosen
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file that contains the BL33 private key in PEM format. If `SAVE_KEYS=1`,
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platform name must be subdirectory of any depth under `plat/`, and must
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this file name will be used to save the key.
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contain a platform makefile named `platform.mk`.
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|
|
||||||
|
* `PRELOADED_BL33_BASE`: This option enables booting a preloaded BL33 image
|
||||||
|
instead of the normal boot flow. When defined, it must specify the entry
|
||||||
|
point address for the preloaded BL33 image. This option is incompatible with
|
||||||
|
`EL3_PAYLOAD_BASE`. If both are defined, `EL3_PAYLOAD_BASE` has priority
|
||||||
|
over `PRELOADED_BL33_BASE`.
|
||||||
|
|
||||||
* `PROGRAMMABLE_RESET_ADDRESS`: This option indicates whether the reset
|
* `PROGRAMMABLE_RESET_ADDRESS`: This option indicates whether the reset
|
||||||
vector address can be programmed or is fixed on the platform. It can take
|
vector address can be programmed or is fixed on the platform. It can take
|
||||||
|
|
@ -372,15 +373,6 @@ performed.
|
||||||
can be optimised. The `plat_get_my_entrypoint()` platform porting interface
|
can be optimised. The `plat_get_my_entrypoint()` platform porting interface
|
||||||
does not need to be implemented in this case.
|
does not need to be implemented in this case.
|
||||||
|
|
||||||
* `COLD_BOOT_SINGLE_CPU`: This option indicates whether the platform may
|
|
||||||
release several CPUs out of reset. It can take either 0 (several CPUs may be
|
|
||||||
brought up) or 1 (only one CPU will ever be brought up during cold reset).
|
|
||||||
Default is 0. If the platform always brings up a single CPU, there is no
|
|
||||||
need to distinguish between primary and secondary CPUs and the boot path can
|
|
||||||
be optimised. The `plat_is_my_cpu_primary()` and
|
|
||||||
`plat_secondary_cold_boot_setup()` platform porting interfaces do not need
|
|
||||||
to be implemented in this case.
|
|
||||||
|
|
||||||
* `PSCI_EXTENDED_STATE_ID`: As per PSCI1.0 Specification, there are 2 formats
|
* `PSCI_EXTENDED_STATE_ID`: As per PSCI1.0 Specification, there are 2 formats
|
||||||
possible for the PSCI power-state parameter viz original and extended
|
possible for the PSCI power-state parameter viz original and extended
|
||||||
State-ID formats. This flag if set to 1, configures the generic PSCI layer
|
State-ID formats. This flag if set to 1, configures the generic PSCI layer
|
||||||
|
|
@ -390,69 +382,36 @@ performed.
|
||||||
and it governs the return value of PSCI_FEATURES API for CPU_SUSPEND
|
and it governs the return value of PSCI_FEATURES API for CPU_SUSPEND
|
||||||
smc function id.
|
smc function id.
|
||||||
|
|
||||||
* `ERROR_DEPRECATED`: This option decides whether to treat the usage of
|
* `RESET_TO_BL31`: Enable BL31 entrypoint as the CPU reset vector instead
|
||||||
deprecated platform APIs, helper functions or drivers within Trusted
|
of the BL1 entrypoint. It can take the value 0 (CPU reset to BL1
|
||||||
Firmware as error. It can take the value 1 (flag the use of deprecated
|
entrypoint) or 1 (CPU reset to BL31 entrypoint).
|
||||||
APIs as error) or 0. The default is 0.
|
The default value is 0.
|
||||||
|
|
||||||
* `SPIN_ON_BL1_EXIT`: This option introduces an infinite loop in BL1. It can
|
* `RESET_TO_SP_MIN`: SP_MIN is the minimal AArch32 Secure Payload provided in
|
||||||
take either 0 (no loop) or 1 (add a loop). 0 is the default. This loop stops
|
ARM Trusted Firmware. This flag configures SP_MIN entrypoint as the CPU
|
||||||
execution in BL1 just before handing over to BL31. At this point, all
|
reset vector instead of the BL1 entrypoint. It can take the value 0 (CPU
|
||||||
firmware images have been loaded in memory, and the MMU and caches are
|
reset to BL1 entrypoint) or 1 (CPU reset to SP_MIN entrypoint). The default
|
||||||
turned off. Refer to the "Debugging options" section for more details.
|
value is 0.
|
||||||
|
|
||||||
* `EL3_PAYLOAD_BASE`: This option enables booting an EL3 payload instead of
|
* `ROT_KEY`: This option is used when `GENERATE_COT=1`. It specifies the
|
||||||
the normal boot flow. It must specify the entry point address of the EL3
|
file that contains the ROT private key in PEM format. If `SAVE_KEYS=1`, this
|
||||||
payload. Please refer to the "Booting an EL3 payload" section for more
|
file name will be used to save the key.
|
||||||
details.
|
|
||||||
|
|
||||||
* `PRELOADED_BL33_BASE`: This option enables booting a preloaded BL33 image
|
* `SAVE_KEYS`: This option is used when `GENERATE_COT=1`. It tells the
|
||||||
instead of the normal boot flow. When defined, it must specify the entry
|
certificate generation tool to save the keys used to establish the Chain of
|
||||||
point address for the preloaded BL33 image. This option is incompatible with
|
Trust. Allowed options are '0' or '1'. Default is '0' (do not save).
|
||||||
`EL3_PAYLOAD_BASE`. If both are defined, `EL3_PAYLOAD_BASE` has priority
|
|
||||||
over `PRELOADED_BL33_BASE`.
|
|
||||||
|
|
||||||
* `PL011_GENERIC_UART`: Boolean option to indicate the PL011 driver that
|
* `SCP_BL2`: Path to SCP_BL2 image in the host file system. This image is optional.
|
||||||
the underlying hardware is not a full PL011 UART but a minimally compliant
|
If a SCP_BL2 image is present then this option must be passed for the `fip`
|
||||||
generic UART, which is a subset of the PL011. The driver will not access
|
target.
|
||||||
any register that is not part of the SBSA generic UART specification.
|
|
||||||
Default value is 0 (a full PL011 compliant UART is present).
|
|
||||||
|
|
||||||
* `CTX_INCLUDE_AARCH32_REGS` : Boolean option that, when set to 1, will cause
|
* `SCP_BL2_KEY`: This option is used when `GENERATE_COT=1`. It specifies the
|
||||||
the AArch32 system registers to be included when saving and restoring the
|
file that contains the SCP_BL2 private key in PEM format. If `SAVE_KEYS=1`,
|
||||||
CPU context. The option must be set to 0 for AArch64-only platforms (that
|
this file name will be used to save the key.
|
||||||
is on hardware that does not implement AArch32, or at least not at EL1 and
|
|
||||||
higher ELs). Default value is 1.
|
|
||||||
|
|
||||||
* `CTX_INCLUDE_FPREGS`: Boolean option that, when set to 1, will cause the FP
|
* `SCP_BL2U`: Path to SCP_BL2U image in the host file system. This image is
|
||||||
registers to be included when saving and restoring the CPU context. Default
|
optional. It is only needed if the platform makefile specifies that it
|
||||||
is 0.
|
is required in order to build the `fwu_fip` target.
|
||||||
|
|
||||||
* `DISABLE_PEDANTIC`: When set to 1 it will disable the -pedantic option in
|
|
||||||
the GCC command line. Default is 0.
|
|
||||||
|
|
||||||
* `BUILD_STRING`: Input string for VERSION_STRING, which allows the TF build
|
|
||||||
to be uniquely identified. Defaults to the current git commit id.
|
|
||||||
|
|
||||||
* `VERSION_STRING`: String used in the log output for each TF image. Defaults
|
|
||||||
to a string formed by concatenating the version number, build type and build
|
|
||||||
string.
|
|
||||||
|
|
||||||
* `BUILD_MESSAGE_TIMESTAMP`: String used to identify the time and date of the
|
|
||||||
compilation of each build. It must be set to a C string (including quotes
|
|
||||||
where applicable). Defaults to a string that contains the time and date of
|
|
||||||
the compilation.
|
|
||||||
|
|
||||||
* `HANDLE_EA_EL3_FIRST`: When defined External Aborts and SError Interrupts
|
|
||||||
will be always trapped in EL3 i.e. in BL31 at runtime.
|
|
||||||
|
|
||||||
* `ENABLE_PMF`: Boolean option to enable support for optional Performance
|
|
||||||
Measurement Framework(PMF). Default is 0.
|
|
||||||
|
|
||||||
* `ENABLE_PSCI_STAT`: Boolean option to enable support for optional PSCI
|
|
||||||
functions `PSCI_STAT_RESIDENCY` and `PSCI_STAT_COUNT`. Default is 0.
|
|
||||||
Enabling this option enables the `ENABLE_PMF` build option as well.
|
|
||||||
The PMF is used for collecting the statistics.
|
|
||||||
|
|
||||||
* `SEPARATE_CODE_AND_RODATA`: Whether code and read-only data should be
|
* `SEPARATE_CODE_AND_RODATA`: Whether code and read-only data should be
|
||||||
isolated on separate memory pages. This is a trade-off between security and
|
isolated on separate memory pages. This is a trade-off between security and
|
||||||
|
|
@ -460,27 +419,96 @@ performed.
|
||||||
pages" section in [Firmware Design]. This flag is disabled by default and
|
pages" section in [Firmware Design]. This flag is disabled by default and
|
||||||
affects all BL images.
|
affects all BL images.
|
||||||
|
|
||||||
* `LOAD_IMAGE_V2`: Boolean option to enable support for new version (v2) of
|
* `SPD`: Choose a Secure Payload Dispatcher component to be built into the
|
||||||
image loading, which provides more flexibility and scalability around what
|
Trusted Firmware. This build option is only valid if `ARCH=aarch64`. The
|
||||||
images are loaded and executed during boot. Default is 0.
|
value should be the path to the directory containing the SPD source,
|
||||||
Note: `TRUSTED_BOARD_BOOT` is currently not supported when `LOAD_IMAGE_V2`
|
relative to `services/spd/`; the directory is expected to
|
||||||
is enabled.
|
contain a makefile called `<spd-value>.mk`.
|
||||||
|
|
||||||
* `ENABLE_RUNTIME_INSTRUMENTATION`: Boolean option to enable runtime
|
* `SPIN_ON_BL1_EXIT`: This option introduces an infinite loop in BL1. It can
|
||||||
instrumentation which injects timestamp collection points into
|
take either 0 (no loop) or 1 (add a loop). 0 is the default. This loop stops
|
||||||
Trusted Firmware to allow runtime performance to be measured.
|
execution in BL1 just before handing over to BL31. At this point, all
|
||||||
Currently, only PSCI is instrumented. Enabling this option enables
|
firmware images have been loaded in memory, and the MMU and caches are
|
||||||
the `ENABLE_PMF` build option as well. Default is 0.
|
turned off. Refer to the "Debugging options" section for more details.
|
||||||
|
|
||||||
|
* `TRUSTED_BOARD_BOOT`: Boolean flag to include support for the Trusted Board
|
||||||
|
Boot feature. When set to '1', BL1 and BL2 images include support to load
|
||||||
|
and verify the certificates and images in a FIP, and BL1 includes support
|
||||||
|
for the Firmware Update. The default value is '0'. Generation and inclusion
|
||||||
|
of certificates in the FIP and FWU_FIP depends upon the value of the
|
||||||
|
`GENERATE_COT` option.
|
||||||
|
|
||||||
|
Note: This option depends on 'CREATE_KEYS' to be enabled. If the keys
|
||||||
|
already exist in disk, they will be overwritten without further notice.
|
||||||
|
|
||||||
|
* `TRUSTED_WORLD_KEY`: This option is used when `GENERATE_COT=1`. It
|
||||||
|
specifies the file that contains the Trusted World private key in PEM
|
||||||
|
format. If `SAVE_KEYS=1`, this file name will be used to save the key.
|
||||||
|
|
||||||
|
* `TSP_INIT_ASYNC`: Choose BL32 initialization method as asynchronous or
|
||||||
|
synchronous, (see "Initializing a BL32 Image" section in [Firmware
|
||||||
|
Design]). It can take the value 0 (BL32 is initialized using
|
||||||
|
synchronous method) or 1 (BL32 is initialized using asynchronous method).
|
||||||
|
Default is 0.
|
||||||
|
|
||||||
|
* `TSP_NS_INTR_ASYNC_PREEMPT`: A non zero value enables the interrupt
|
||||||
|
routing model which routes non-secure interrupts asynchronously from TSP
|
||||||
|
to EL3 causing immediate preemption of TSP. The EL3 is responsible
|
||||||
|
for saving and restoring the TSP context in this routing model. The
|
||||||
|
default routing model (when the value is 0) is to route non-secure
|
||||||
|
interrupts to TSP allowing it to save its context and hand over
|
||||||
|
synchronously to EL3 via an SMC.
|
||||||
|
|
||||||
|
* `USE_COHERENT_MEM`: This flag determines whether to include the coherent
|
||||||
|
memory region in the BL memory map or not (see "Use of Coherent memory in
|
||||||
|
Trusted Firmware" section in [Firmware Design]). It can take the value 1
|
||||||
|
(Coherent memory region is included) or 0 (Coherent memory region is
|
||||||
|
excluded). Default is 1.
|
||||||
|
|
||||||
|
* `V`: Verbose build. If assigned anything other than 0, the build commands
|
||||||
|
are printed. Default is 0.
|
||||||
|
|
||||||
|
* `VERSION_STRING`: String used in the log output for each TF image. Defaults
|
||||||
|
to a string formed by concatenating the version number, build type and build
|
||||||
|
string.
|
||||||
|
|
||||||
#### ARM development platform specific build options
|
#### ARM development platform specific build options
|
||||||
|
|
||||||
* `ARM_TSP_RAM_LOCATION`: location of the TSP binary. Options:
|
* 'ARM_BL31_IN_DRAM': Boolean option to select loading of BL31 in TZC secured
|
||||||
- `tsram` : Trusted SRAM (default option)
|
DRAM. By default, BL31 is in the secure SRAM. Set this flag to 1 to load
|
||||||
- `tdram` : Trusted DRAM (if available)
|
BL31 in TZC secured DRAM. If TSP is present, then setting this option also
|
||||||
- `dram` : Secure region in DRAM (configured by the TrustZone controller)
|
sets the TSP location to DRAM and ignores the `ARM_TSP_RAM_LOCATION` build
|
||||||
|
flag.
|
||||||
|
|
||||||
For a better understanding of these options, the ARM development platform memory
|
* `ARM_BOARD_OPTIMISE_MEM`: Boolean option to enable or disable optimisation
|
||||||
map is explained in the [Firmware Design].
|
of the memory reserved for each image. This affects the maximum size of each
|
||||||
|
BL image as well as the number of allocated memory regions and translation
|
||||||
|
tables. By default this flag is 0, which means it uses the default
|
||||||
|
unoptimised values for these macros. ARM development platforms that wish to
|
||||||
|
optimise memory usage need to set this flag to 1 and must override the
|
||||||
|
related macros.
|
||||||
|
|
||||||
|
* `ARM_CONFIG_CNTACR`: boolean option to unlock access to the CNTBase<N>
|
||||||
|
frame registers by setting the CNTCTLBase.CNTACR<N> register bits. The
|
||||||
|
frame number <N> is defined by 'PLAT_ARM_NSTIMER_FRAME_ID', which should
|
||||||
|
match the frame used by the Non-Secure image (normally the Linux kernel).
|
||||||
|
Default is true (access to the frame is allowed).
|
||||||
|
|
||||||
|
* `ARM_DISABLE_TRUSTED_WDOG`: boolean option to disable the Trusted Watchdog.
|
||||||
|
By default, ARM platforms use a watchdog to trigger a system reset in case
|
||||||
|
an error is encountered during the boot process (for example, when an image
|
||||||
|
could not be loaded or authenticated). The watchdog is enabled in the early
|
||||||
|
platform setup hook at BL1 and disabled in the BL1 prepare exit hook. The
|
||||||
|
Trusted Watchdog may be disabled at build time for testing or development
|
||||||
|
purposes.
|
||||||
|
|
||||||
|
* `ARM_RECOM_STATE_ID_ENC`: The PSCI1.0 specification recommends an encoding
|
||||||
|
for the construction of composite state-ID in the power-state parameter.
|
||||||
|
The existing PSCI clients currently do not support this encoding of
|
||||||
|
State-ID yet. Hence this flag is used to configure whether to use the
|
||||||
|
recommended State-ID encoding or not. The default value of this flag is 0,
|
||||||
|
in which case the platform is configured to expect NULL in the State-ID
|
||||||
|
field of power-state parameter.
|
||||||
|
|
||||||
* `ARM_ROTPK_LOCATION`: used when `TRUSTED_BOARD_BOOT=1`. It specifies the
|
* `ARM_ROTPK_LOCATION`: used when `TRUSTED_BOARD_BOOT=1`. It specifies the
|
||||||
location of the ROTPK hash returned by the function `plat_get_rotpk_info()`
|
location of the ROTPK hash returned by the function `plat_get_rotpk_info()`
|
||||||
|
|
@ -499,41 +527,13 @@ map is explained in the [Firmware Design].
|
||||||
this option, `arm_rotprivk_rsa.pem` must be specified as `ROT_KEY` when
|
this option, `arm_rotprivk_rsa.pem` must be specified as `ROT_KEY` when
|
||||||
creating the certificates.
|
creating the certificates.
|
||||||
|
|
||||||
* `ARM_RECOM_STATE_ID_ENC`: The PSCI1.0 specification recommends an encoding
|
* `ARM_TSP_RAM_LOCATION`: location of the TSP binary. Options:
|
||||||
for the construction of composite state-ID in the power-state parameter.
|
- `tsram` : Trusted SRAM (default option)
|
||||||
The existing PSCI clients currently do not support this encoding of
|
- `tdram` : Trusted DRAM (if available)
|
||||||
State-ID yet. Hence this flag is used to configure whether to use the
|
- `dram` : Secure region in DRAM (configured by the TrustZone controller)
|
||||||
recommended State-ID encoding or not. The default value of this flag is 0,
|
|
||||||
in which case the platform is configured to expect NULL in the State-ID
|
|
||||||
field of power-state parameter.
|
|
||||||
|
|
||||||
* `ARM_DISABLE_TRUSTED_WDOG`: boolean option to disable the Trusted Watchdog.
|
For a better understanding of these options, the ARM development platform memory
|
||||||
By default, ARM platforms use a watchdog to trigger a system reset in case
|
map is explained in the [Firmware Design].
|
||||||
an error is encountered during the boot process (for example, when an image
|
|
||||||
could not be loaded or authenticated). The watchdog is enabled in the early
|
|
||||||
platform setup hook at BL1 and disabled in the BL1 prepare exit hook. The
|
|
||||||
Trusted Watchdog may be disabled at build time for testing or development
|
|
||||||
purposes.
|
|
||||||
|
|
||||||
* `ARM_CONFIG_CNTACR`: boolean option to unlock access to the CNTBase<N>
|
|
||||||
frame registers by setting the CNTCTLBase.CNTACR<N> register bits. The
|
|
||||||
frame number <N> is defined by 'PLAT_ARM_NSTIMER_FRAME_ID', which should
|
|
||||||
match the frame used by the Non-Secure image (normally the Linux kernel).
|
|
||||||
Default is true (access to the frame is allowed).
|
|
||||||
|
|
||||||
* `ARM_BOARD_OPTIMISE_MEM`: Boolean option to enable or disable optimisation
|
|
||||||
of the memory reserved for each image. This affects the maximum size of each
|
|
||||||
BL image as well as the number of allocated memory regions and translation
|
|
||||||
tables. By default this flag is 0, which means it uses the default
|
|
||||||
unoptimised values for these macros. ARM development platforms that wish to
|
|
||||||
optimise memory usage need to set this flag to 1 and must override the
|
|
||||||
related macros.
|
|
||||||
|
|
||||||
* 'ARM_BL31_IN_DRAM': Boolean option to select loading of BL31 in TZC secured
|
|
||||||
DRAM. By default, BL31 is in the secure SRAM. Set this flag to 1 to load
|
|
||||||
BL31 in TZC secured DRAM. If TSP is present, then setting this option also
|
|
||||||
sets the TSP location to DRAM and ignores the `ARM_TSP_RAM_LOCATION` build
|
|
||||||
flag.
|
|
||||||
|
|
||||||
#### ARM CSS platform specific build options
|
#### ARM CSS platform specific build options
|
||||||
|
|
||||||
|
|
@ -550,6 +550,19 @@ map is explained in the [Firmware Design].
|
||||||
|
|
||||||
#### ARM FVP platform specific build options
|
#### ARM FVP platform specific build options
|
||||||
|
|
||||||
|
* `FVP_CLUSTER_COUNT` : Configures the cluster count to be used to
|
||||||
|
build the topology tree within Trusted Firmware. By default the
|
||||||
|
Trusted Firmware is configured for dual cluster topology and this option
|
||||||
|
can be used to override the default value.
|
||||||
|
|
||||||
|
* `FVP_INTERCONNECT_DRIVER`: Selects the interconnect driver to be built. The
|
||||||
|
default interconnect driver depends on the value of `FVP_CLUSTER_COUNT` as
|
||||||
|
explained in the options below:
|
||||||
|
- `FVP_CCI` : The CCI driver is selected. This is the default
|
||||||
|
if 0 < `FVP_CLUSTER_COUNT` <= 2.
|
||||||
|
- `FVP_CCN` : The CCN driver is selected. This is the default
|
||||||
|
if `FVP_CLUSTER_COUNT` > 2.
|
||||||
|
|
||||||
* `FVP_USE_GIC_DRIVER` : Selects the GIC driver to be built. Options:
|
* `FVP_USE_GIC_DRIVER` : Selects the GIC driver to be built. Options:
|
||||||
- `FVP_GICV2` : The GICv2 only driver is selected
|
- `FVP_GICV2` : The GICv2 only driver is selected
|
||||||
- `FVP_GICV3` : The GICv3 only driver is selected (default option)
|
- `FVP_GICV3` : The GICv3 only driver is selected (default option)
|
||||||
|
|
@ -558,23 +571,10 @@ map is explained in the [Firmware Design].
|
||||||
GICv3 hardware, then it configures the hardware to run in GICv2
|
GICv3 hardware, then it configures the hardware to run in GICv2
|
||||||
emulation mode
|
emulation mode
|
||||||
|
|
||||||
* `FVP_CLUSTER_COUNT` : Configures the cluster count to be used to
|
|
||||||
build the topology tree within Trusted Firmware. By default the
|
|
||||||
Trusted Firmware is configured for dual cluster topology and this option
|
|
||||||
can be used to override the default value.
|
|
||||||
|
|
||||||
* `FVP_USE_SP804_TIMER` : Use the SP804 timer instead of the Generic Timer
|
* `FVP_USE_SP804_TIMER` : Use the SP804 timer instead of the Generic Timer
|
||||||
for functions that wait for an arbitrary time length (udelay and mdelay).
|
for functions that wait for an arbitrary time length (udelay and mdelay).
|
||||||
The default value is 0.
|
The default value is 0.
|
||||||
|
|
||||||
* `FVP_INTERCONNECT_DRIVER`: Selects the interconnect driver to be built. The
|
|
||||||
default interconnect driver depends on the value of `FVP_CLUSTER_COUNT` as
|
|
||||||
explained in the options below:
|
|
||||||
- `FVP_CCI` : The CCI driver is selected. This is the default
|
|
||||||
if 0 < `FVP_CLUSTER_COUNT` <= 2.
|
|
||||||
- `FVP_CCN` : The CCN driver is selected. This is the default
|
|
||||||
if `FVP_CLUSTER_COUNT` > 2.
|
|
||||||
|
|
||||||
### Debugging options
|
### Debugging options
|
||||||
|
|
||||||
To compile a debug version and make the build more verbose use
|
To compile a debug version and make the build more verbose use
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue