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plat: xilinx: zynqmp: Get chipid from registers for BL32 

This patch reads the chipid registers directly instead of making
pm call when running at BL32. User should ensure that these registers
should always be accessed from APU in their system configuration.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
This commit is contained in:
Siva Durga Prasad Paladugu 2018-06-20 17:03:57 +05:30
parent d37442f769
commit 0435ba642d
1 changed files with 12 additions and 3 deletions
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15
plat/xilinx/zynqmp/aarch64/zynqmp_common.c
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@ -205,12 +205,21 @@ static char *zynqmp_get_silicon_idcode_name(void)
{
uint32_t id, ver, chipid[2];
size_t i, j, len;
enum pm_ret_status ret;
const char *name = "EG/EV";
ret = pm_get_chipid(chipid);
if (ret)
#ifdef IMAGE_BL32
/*
* For BL32, get the chip id info directly by reading corresponding
* registers instead of making pm call. This has limitation
* that these registers should be configured to have access
* from APU which is default case.
*/
chipid[0] = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_IDCODE_OFFSET);
chipid[1] = mmio_read_32(EFUSE_BASEADDR + EFUSE_IPDISABLE_OFFSET);
#else
if (pm_get_chipid(chipid) != PM_RET_SUCCESS)
return "UNKN";
#endif
id = chipid[0] & (ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
ZYNQMP_CSU_IDCODE_SVD_MASK);