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mediatek: mt8195: add power-off support 

mt8195 also uses PMIC mt6359p. The only difference is the
pwrap register definition.

Change-Id: I9962263c46187d1344f14f857bf4b51e33aedda0
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
This commit is contained in:
Yidi Lin 2021-04-08 16:37:15 +08:00
parent fcc6617398
commit 0909819a4f
6 changed files with 125 additions and 0 deletions
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13
plat/mediatek/mt8195/drivers/pmic/pmic.c Normal file
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@ -0,0 +1,13 @@
/*
* Copyright (c) 2020, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <pmic.h>
#include <pmic_wrap_init.h>
void pmic_power_off(void)
{
pwrap_write(PMIC_PWRHOLD, 0x0);
}

15
plat/mediatek/mt8195/drivers/pmic/pmic.h Normal file
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@ -0,0 +1,15 @@
/*
* Copyright (c) 2020, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PMIC_H
#define PMIC_H
#define PMIC_PWRHOLD 0xa08
/* external API */
void pmic_power_off(void);
#endif /* PMIC_H */

76
plat/mediatek/mt8195/drivers/pmic/pmic_wrap_init.h Normal file
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@ -0,0 +1,76 @@
/*
* Copyright (c) 2020, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PMIC_WRAP_INIT_H
#define PMIC_WRAP_INIT_H
#include <stdint.h>
#include "platform_def.h"
/* external API */
int32_t pwrap_read(uint32_t adr, uint32_t *rdata);
int32_t pwrap_write(uint32_t adr, uint32_t wdata);
static struct mt8195_pmic_wrap_regs *const mtk_pwrap = (void *)PMIC_WRAP_BASE;
/* PMIC_WRAP registers */
struct mt8195_pmic_wrap_regs {
uint32_t init_done;
uint32_t reserved[543];
uint32_t wacs2_cmd;
uint32_t wacs2_wdata;
uint32_t reserved1[3];
uint32_t wacs2_rdata;
uint32_t reserved2[3];
uint32_t wacs2_vldclr;
uint32_t wacs2_sta;
};
#define GET_WACS_FSM(x) ((x >> 1) & 0x7)
/* macro for SWINF_FSM */
#define SWINF_FSM_IDLE (0x00)
#define SWINF_FSM_REQ (0x02)
#define SWINF_FSM_WFDLE (0x04)
#define SWINF_FSM_WFVLDCLR (0x06)
#define SWINF_INIT_DONE (0x01)
/* timeout setting */
#define PWRAP_READ_US 1000
#define PWRAP_WAIT_IDLE_US 1000
/* error information flag */
enum pwrap_errno {
E_PWR_INVALID_ARG = 1,
E_PWR_INVALID_RW = 2,
E_PWR_INVALID_ADDR = 3,
E_PWR_INVALID_WDAT = 4,
E_PWR_INVALID_OP_MANUAL = 5,
E_PWR_NOT_IDLE_STATE = 6,
E_PWR_NOT_INIT_DONE = 7,
E_PWR_NOT_INIT_DONE_READ = 8,
E_PWR_WAIT_IDLE_TIMEOUT = 9,
E_PWR_WAIT_IDLE_TIMEOUT_READ = 10,
E_PWR_INIT_SIDLY_FAIL = 11,
E_PWR_RESET_TIMEOUT = 12,
E_PWR_TIMEOUT = 13,
E_PWR_INIT_RESET_SPI = 20,
E_PWR_INIT_SIDLY = 21,
E_PWR_INIT_REG_CLOCK = 22,
E_PWR_INIT_ENABLE_PMIC = 23,
E_PWR_INIT_DIO = 24,
E_PWR_INIT_CIPHER = 25,
E_PWR_INIT_WRITE_TEST = 26,
E_PWR_INIT_ENABLE_CRC = 27,
E_PWR_INIT_ENABLE_DEWRAP = 28,
E_PWR_INIT_ENABLE_EVENT = 29,
E_PWR_READ_TEST_FAIL = 30,
E_PWR_WRITE_TEST_FAIL = 31,
E_PWR_SWITCH_DIO = 32
};
#endif /* PMIC_WRAP_INIT_H */

5
plat/mediatek/mt8195/include/platform_def.h
View File

@ -44,6 +44,11 @@
#define UART_BAUDRATE 115200
/*******************************************************************************
* PMIC related constants
******************************************************************************/
#define PMIC_WRAP_BASE (IO_PHYS + 0x00024000)
/*******************************************************************************
* System counter frequency related constants
******************************************************************************/

13
plat/mediatek/mt8195/plat_pm.c
View File

@ -19,6 +19,7 @@
#include <plat_mtk_lpm.h>
#include <plat_params.h>
#include <plat_pm.h>
#include <pmic.h>
/*
* Cluster state request:
@ -350,8 +351,20 @@ static void __dead2 plat_mtk_system_reset(void)
panic();
}
static void __dead2 plat_mtk_system_off(void)
{
INFO("MTK System Off\n");
pmic_power_off();
wfi();
ERROR("MTK System Off: operation not handled.\n");
panic();
}
static const plat_psci_ops_t plat_psci_ops = {
.system_reset = plat_mtk_system_reset,
.system_off = plat_mtk_system_off,
.cpu_standby = plat_cpu_standby,
.pwr_domain_on = plat_power_domain_on,
.pwr_domain_on_finish = plat_power_domain_on_finish,

3
plat/mediatek/mt8195/platform.mk
View File

@ -13,6 +13,7 @@ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT}/common/drivers/timer/ \
-I${MTK_PLAT_SOC}/drivers/gpio/ \
-I${MTK_PLAT_SOC}/drivers/mcdi/ \
-I${MTK_PLAT_SOC}/drivers/pmic/ \
-I${MTK_PLAT_SOC}/drivers/spmc/ \
-I${MTK_PLAT_SOC}/include/
@ -37,6 +38,7 @@ BL31_SOURCES += common/desc_image_load.c \
plat/common/plat_gicv3.c \
${MTK_PLAT}/common/drivers/gic600/mt_gic_v3.c \
${MTK_PLAT}/common/drivers/gpio/mtgpio_common.c \
${MTK_PLAT}/common/drivers/pmic_wrap/pmic_wrap_init_v2.c \
${MTK_PLAT}/common/drivers/timer/mt_timer.c \
${MTK_PLAT}/common/mtk_cirq.c \
${MTK_PLAT}/common/mtk_plat_common.c \
@ -50,6 +52,7 @@ BL31_SOURCES += common/desc_image_load.c \
${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c \
${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c \
${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \
${MTK_PLAT_SOC}/drivers/pmic/pmic.c \
${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c \
${MTK_PLAT_SOC}/plat_pm.c \
${MTK_PLAT_SOC}/plat_sip_calls.c \