From 0922e481e5a2dc2925ca9f26a4de7c9ef7abe1d6 Mon Sep 17 00:00:00 2001 From: Masahisa Kojima Date: Tue, 2 Jun 2020 05:54:13 +0900 Subject: [PATCH] xlat_tables_v2: add base table section name parameter for spm_mm Core spm_mm code expects the translation tables are located in the inner & outer WBWA & shareable memory. REGISTER_XLAT_CONTEXT2 macro is used to specify the translation table section in spm_mm. In the commit 363830df1c28e (xlat_tables_v2: merge REGISTER_XLAT_CONTEXT_{FULL_SPEC,RO_BASE_TABLE}), REGISTER_XLAT_CONTEXT2 macro explicitly specifies the base xlat table goes into .bss by default. This change affects the existing SynQuacer spm_mm implementation. plat/socionext/synquacer/include/plat.ld.S linker script intends to locate ".bss.sp_base_xlat_table" into "sp_xlat_table" section, but this implementation is no longer available. This patch adds the base table section name parameter for REGISTER_XLAT_CONTEXT2 so that platform can specify the inner & outer WBWA & shareable memory for spm_mm base xlat table. If PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME is not defined, base xlat table goes into .bss by default, the result is same as before. Change-Id: Ie0e1a235e5bd4288dc376f582d6c44c5df6d31b2 Signed-off-by: Masahisa Kojima --- include/lib/xlat_tables/xlat_tables_v2.h | 8 ++++++-- plat/socionext/synquacer/include/plat.ld.S | 1 - plat/socionext/synquacer/include/platform_def.h | 1 + services/std_svc/spm_mm/spm_mm_xlat.c | 6 +++++- 4 files changed, 12 insertions(+), 4 deletions(-) diff --git a/include/lib/xlat_tables/xlat_tables_v2.h b/include/lib/xlat_tables/xlat_tables_v2.h index 8eb84a892..359b9839a 100644 --- a/include/lib/xlat_tables/xlat_tables_v2.h +++ b/include/lib/xlat_tables/xlat_tables_v2.h @@ -201,16 +201,20 @@ typedef struct xlat_ctx xlat_ctx_t; * _section_name: * Specify the name of the section where the translation tables have to be * placed by the linker. + * + * _base_table_section_name: + * Specify the name of the section where the base translation tables have to + * be placed by the linker. */ #define REGISTER_XLAT_CONTEXT2(_ctx_name, _mmap_count, _xlat_tables_count, \ _virt_addr_space_size, _phy_addr_space_size, \ - _xlat_regime, _section_name) \ + _xlat_regime, _section_name, _base_table_section_name) \ REGISTER_XLAT_CONTEXT_FULL_SPEC(_ctx_name, (_mmap_count), \ (_xlat_tables_count), \ (_virt_addr_space_size), \ (_phy_addr_space_size), \ (_xlat_regime), \ - (_section_name), ".bss" \ + (_section_name), (_base_table_section_name) \ ) /****************************************************************************** diff --git a/plat/socionext/synquacer/include/plat.ld.S b/plat/socionext/synquacer/include/plat.ld.S index a06fe2adb..af7a172db 100644 --- a/plat/socionext/synquacer/include/plat.ld.S +++ b/plat/socionext/synquacer/include/plat.ld.S @@ -25,7 +25,6 @@ SECTIONS */ sp_xlat_table (NOLOAD) : ALIGN(PAGE_SIZE) { *(sp_xlat_table) - *(.bss.sp_base_xlat_table) } >SP_DRAM } diff --git a/plat/socionext/synquacer/include/platform_def.h b/plat/socionext/synquacer/include/platform_def.h index b87ac3fd6..2f8613a7e 100644 --- a/plat/socionext/synquacer/include/platform_def.h +++ b/plat/socionext/synquacer/include/platform_def.h @@ -144,6 +144,7 @@ #define PLAT_SP_IMAGE_MMAP_REGIONS 30 #define PLAT_SP_IMAGE_MAX_XLAT_TABLES 20 #define PLAT_SP_IMAGE_XLAT_SECTION_NAME "sp_xlat_table" +#define PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME "sp_xlat_table" #define PLAT_SQ_UART1_BASE PLAT_SQ_BOOT_UART_BASE #define PLAT_SQ_UART1_SIZE ULL(0x1000) diff --git a/services/std_svc/spm_mm/spm_mm_xlat.c b/services/std_svc/spm_mm/spm_mm_xlat.c index 6c02f0743..eae597cab 100644 --- a/services/std_svc/spm_mm/spm_mm_xlat.c +++ b/services/std_svc/spm_mm/spm_mm_xlat.c @@ -21,13 +21,17 @@ #ifndef PLAT_SP_IMAGE_XLAT_SECTION_NAME #define PLAT_SP_IMAGE_XLAT_SECTION_NAME "xlat_table" #endif +#ifndef PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME +#define PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME ".bss" +#endif /* Allocate and initialise the translation context for the secure partitions. */ REGISTER_XLAT_CONTEXT2(sp, PLAT_SP_IMAGE_MMAP_REGIONS, PLAT_SP_IMAGE_MAX_XLAT_TABLES, PLAT_VIRT_ADDR_SPACE_SIZE, PLAT_PHY_ADDR_SPACE_SIZE, - EL1_EL0_REGIME, PLAT_SP_IMAGE_XLAT_SECTION_NAME); + EL1_EL0_REGIME, PLAT_SP_IMAGE_XLAT_SECTION_NAME, + PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME); /* Lock used for SP_MEMORY_ATTRIBUTES_GET and SP_MEMORY_ATTRIBUTES_SET */ static spinlock_t mem_attr_smc_lock;