From 0c9f91cf699565c858e650d19bbdcab513d5001a Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Tue, 20 Jul 2021 19:20:07 +0100 Subject: [PATCH] refactor(gicv3): rename GIC Clayton to GIC-700 The GIC IP formerly known as "GIC Clayton" has been released under the name of "GIC-700". Rename occurences of Clayton in comments and macro names to reflect the official name. Change-Id: Ie8c55f7da7753127d58c8382b0033c1b486f7909 Signed-off-by: Andre Przywara --- drivers/arm/gic/v3/gic-x00.c | 8 ++++---- drivers/arm/gic/v3/gic600_multichip_private.h | 4 ++-- plat/arm/board/rdn2/platform.mk | 2 +- plat/arm/board/rdv1/platform.mk | 2 +- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/arm/gic/v3/gic-x00.c b/drivers/arm/gic/v3/gic-x00.c index 6e106babf..eccfd976f 100644 --- a/drivers/arm/gic/v3/gic-x00.c +++ b/drivers/arm/gic/v3/gic-x00.c @@ -24,7 +24,7 @@ #define GICR_PWRR 0x24U #define IIDR_MODEL_ARM_GIC_600 U(0x0200043b) #define IIDR_MODEL_ARM_GIC_600AE U(0x0300043b) -#define IIDR_MODEL_ARM_GIC_CLAYTON U(0x0400043b) +#define IIDR_MODEL_ARM_GIC_700 U(0x0400043b) /* GICR_PWRR fields */ #define PWRR_RDPD_SHIFT 0 @@ -46,7 +46,7 @@ #if GICV3_SUPPORT_GIC600 -/* GIC-600/Clayton specific accessor functions */ +/* GIC-600/700 specific accessor functions */ static void gicr_write_pwrr(uintptr_t base, unsigned int val) { mmio_write_32(base + GICR_PWRR, val); @@ -123,12 +123,12 @@ static bool gicv3_redists_need_power_mgmt(uintptr_t gicr_base) uint32_t reg = mmio_read_32(gicr_base + GICR_IIDR); /* - * The Arm GIC-600 and GIC-Clayton models have their redistributors + * The Arm GIC-600 and GIC-700 models have their redistributors * powered down at reset. */ return (((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600) || ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600AE) || - ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_CLAYTON)); + ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_700)); } #endif /* GICV3_SUPPORT_GIC600 */ diff --git a/drivers/arm/gic/v3/gic600_multichip_private.h b/drivers/arm/gic/v3/gic600_multichip_private.h index fe4134cba..27b8e817f 100644 --- a/drivers/arm/gic/v3/gic600_multichip_private.h +++ b/drivers/arm/gic/v3/gic600_multichip_private.h @@ -28,8 +28,8 @@ #define GICD_DCHIPR_RT_OWNER_SHIFT 4 /* - * If GIC v4 extension is enabled, then use SPI macros specific to GIC-Clayton. - * Other shifts and mask remains same between GIC-600 and GIC-Clayton. + * If GIC v4 extension is enabled, then use SPI macros specific to GIC-700. + * Other shifts and mask remains same between GIC-600 and GIC-700. */ #if GIC_ENABLE_V4_EXTN #define GICD_CHIPRx_SPI_BLOCK_MIN_SHIFT 9 diff --git a/plat/arm/board/rdn2/platform.mk b/plat/arm/board/rdn2/platform.mk index 794f8974f..5b24c32bd 100644 --- a/plat/arm/board/rdn2/platform.mk +++ b/plat/arm/board/rdn2/platform.mk @@ -3,7 +3,7 @@ # SPDX-License-Identifier: BSD-3-Clause # -# RD-N2 platform uses GIC-Clayton which is based on GICv4.1 +# RD-N2 platform uses GIC-700 which is based on GICv4.1 GIC_ENABLE_V4_EXTN := 1 include plat/arm/css/sgi/sgi-common.mk diff --git a/plat/arm/board/rdv1/platform.mk b/plat/arm/board/rdv1/platform.mk index 1ae85de7c..11f52127e 100644 --- a/plat/arm/board/rdv1/platform.mk +++ b/plat/arm/board/rdv1/platform.mk @@ -3,7 +3,7 @@ # SPDX-License-Identifier: BSD-3-Clause # -# RD-V1 platform uses GIC-Clayton which is based on GICv4.1 +# RD-V1 platform uses GIC-700 which is based on GICv4.1 GIC_ENABLE_V4_EXTN := 1 include plat/arm/css/sgi/sgi-common.mk