Rename PLAT_ARM_BL31_RUN_UART* variable
The variable is renamed to PLAT_ARM_RUN_UART as the UART is used outside BL31 as well. Change-Id: I00e3639dfb2001758b7d24548c11236c6335f64a Signed-off-by: Usama Arif <usama.arif@arm.com>
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@ -61,14 +61,14 @@
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#define PLAT_ARM_BOOT_UART_BASE SOC_CSS_UART0_BASE
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#define PLAT_ARM_BOOT_UART_CLK_IN_HZ SOC_CSS_UART0_CLK_IN_HZ
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#define PLAT_ARM_BL31_RUN_UART_BASE SOC_CSS_UART1_BASE
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#define PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
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#define PLAT_ARM_RUN_UART_BASE SOC_CSS_UART1_BASE
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#define PLAT_ARM_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
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#define PLAT_ARM_SP_MIN_RUN_UART_BASE SOC_CSS_UART1_BASE
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#define PLAT_ARM_SP_MIN_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
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#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_BL31_RUN_UART_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ
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#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_RUN_UART_CLK_IN_HZ
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#define PLAT_ARM_TSP_UART_BASE V2M_IOFPGA_UART0_BASE
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#define PLAT_ARM_TSP_UART_CLK_IN_HZ V2M_IOFPGA_UART0_CLK_IN_HZ
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@ -173,14 +173,14 @@
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#define PLAT_ARM_BOOT_UART_BASE V2M_IOFPGA_UART0_BASE
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#define PLAT_ARM_BOOT_UART_CLK_IN_HZ V2M_IOFPGA_UART0_CLK_IN_HZ
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#define PLAT_ARM_BL31_RUN_UART_BASE V2M_IOFPGA_UART1_BASE
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#define PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ V2M_IOFPGA_UART1_CLK_IN_HZ
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#define PLAT_ARM_RUN_UART_BASE V2M_IOFPGA_UART1_BASE
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#define PLAT_ARM_RUN_UART_CLK_IN_HZ V2M_IOFPGA_UART1_CLK_IN_HZ
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#define PLAT_ARM_SP_MIN_RUN_UART_BASE V2M_IOFPGA_UART1_BASE
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#define PLAT_ARM_SP_MIN_RUN_UART_CLK_IN_HZ V2M_IOFPGA_UART1_CLK_IN_HZ
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#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_BL31_RUN_UART_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ
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#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_RUN_UART_CLK_IN_HZ
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#define PLAT_ARM_TSP_UART_BASE V2M_IOFPGA_UART2_BASE
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#define PLAT_ARM_TSP_UART_CLK_IN_HZ V2M_IOFPGA_UART2_CLK_IN_HZ
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@ -15,14 +15,14 @@
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#define PLAT_ARM_BOOT_UART_BASE 0x2A400000
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#define PLAT_ARM_BOOT_UART_CLK_IN_HZ 50000000
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#define PLAT_ARM_BL31_RUN_UART_BASE 0x2A410000
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#define PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ 50000000
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#define PLAT_ARM_RUN_UART_BASE 0x2A410000
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#define PLAT_ARM_RUN_UART_CLK_IN_HZ 50000000
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#define PLAT_ARM_SP_MIN_RUN_UART_BASE 0x2A410000
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#define PLAT_ARM_SP_MIN_RUN_UART_CLK_IN_HZ 50000000
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#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_BL31_RUN_UART_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ
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#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE
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#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_RUN_UART_CLK_IN_HZ
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#define PLAT_ARM_DRAM2_SIZE ULL(0x780000000)
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@ -61,8 +61,8 @@ void arm_console_boot_end(void)
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void arm_console_runtime_init(void)
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{
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#if MULTI_CONSOLE_API
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int rc = console_pl011_register(PLAT_ARM_BL31_RUN_UART_BASE,
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PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ,
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int rc = console_pl011_register(PLAT_ARM_RUN_UART_BASE,
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PLAT_ARM_RUN_UART_CLK_IN_HZ,
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ARM_CONSOLE_BAUDRATE,
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&arm_runtime_console);
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if (rc == 0)
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@ -70,8 +70,8 @@ void arm_console_runtime_init(void)
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console_set_scope(&arm_runtime_console.console, CONSOLE_FLAG_RUNTIME);
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#else
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(void)console_init(PLAT_ARM_BL31_RUN_UART_BASE,
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PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ,
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(void)console_init(PLAT_ARM_RUN_UART_BASE,
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PLAT_ARM_RUN_UART_CLK_IN_HZ,
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ARM_CONSOLE_BAUDRATE);
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#endif /* MULTI_CONSOLE_API */
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}
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