From 0e480e0e8fd8874a0562b730055d47b7e5aab525 Mon Sep 17 00:00:00 2001
From: Grzegorz Szymaszek <gszymaszek@short.pl>
Date: Wed, 21 Apr 2021 19:30:50 +0200
Subject: [PATCH] fdts: stm32mp1: add alternative SDMMC2 pins to the pinctrl
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The new pins—PA8, PA9, PE5, and PC7—are described in a new pinctrl node
named “sdmmc2-d47-3”, AKA phandle “sdmmc2_d47_pins_d”. These names are
identical to their Linux kernel counterparts (commit
7af08140979a6e7e12b78c93b8625c8d25b084e2).

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Change-Id: Ie6a019f4361790f6b5d4910ce1e7b507a6c6a21a
---
 fdts/stm32mp15-pinctrl.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/fdts/stm32mp15-pinctrl.dtsi b/fdts/stm32mp15-pinctrl.dtsi
index 781b5ec57..058cde264 100644
--- a/fdts/stm32mp15-pinctrl.dtsi
+++ b/fdts/stm32mp15-pinctrl.dtsi
@@ -176,6 +176,15 @@
 		};
 	};
 
+	sdmmc2_d47_pins_d: sdmmc2-d47-3 {
+		pins {
+			pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
+				 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
+				 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
+				 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
+		};
+	};
+
 	uart4_pins_a: uart4-0 {
 		pins1 {
 			pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */