plat: marvell: armada: adjust trusted DRAM size to match OP-TEE OS
Area used as trusted DRAM is 12MB in Marvell OP-TEE OS module. It is followed by 4MB of shared memory. Change-Id: If8edeeec5861b529408baca25f78c06a0a440d8c Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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@ -83,9 +83,11 @@
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#define PLAT_MARVELL_TRUSTED_ROM_BASE PLAT_MARVELL_ATF_LOAD_ADDR
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#define PLAT_MARVELL_TRUSTED_ROM_BASE PLAT_MARVELL_ATF_LOAD_ADDR
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/* 4 MB for FIP image */
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/* 4 MB for FIP image */
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#define PLAT_MARVELL_TRUSTED_ROM_SIZE 0x00400000
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#define PLAT_MARVELL_TRUSTED_ROM_SIZE 0x00400000
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/* Reserve 16M for SCP (Secure PayLoad) Trusted DRAM */
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/* Reserve 12M for SCP (Secure PayLoad) Trusted RAM
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* OP-TEE SHMEM follows this region
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*/
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#define PLAT_MARVELL_TRUSTED_RAM_BASE 0x04400000
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#define PLAT_MARVELL_TRUSTED_RAM_BASE 0x04400000
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#define PLAT_MARVELL_TRUSTED_RAM_SIZE 0x01000000 /* 16 MB */
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#define PLAT_MARVELL_TRUSTED_RAM_SIZE 0x00C00000 /* 12 MB DRAM */
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/*
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/*
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* PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size
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* PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size
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@ -96,9 +96,11 @@
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#define PLAT_MARVELL_TRUSTED_ROM_BASE PLAT_MARVELL_ATF_LOAD_ADDR
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#define PLAT_MARVELL_TRUSTED_ROM_BASE PLAT_MARVELL_ATF_LOAD_ADDR
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/* 4 MB for FIP image */
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/* 4 MB for FIP image */
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#define PLAT_MARVELL_TRUSTED_ROM_SIZE 0x00400000
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#define PLAT_MARVELL_TRUSTED_ROM_SIZE 0x00400000
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/* Reserve 16M for SCP (Secure PayLoad) Trusted RAM */
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/* Reserve 12M for SCP (Secure PayLoad) Trusted RAM
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* OP-TEE SHMEM follows this region
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*/
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#define PLAT_MARVELL_TRUSTED_RAM_BASE 0x04400000
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#define PLAT_MARVELL_TRUSTED_RAM_BASE 0x04400000
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#define PLAT_MARVELL_TRUSTED_RAM_SIZE 0x01000000 /* 16 MB DRAM */
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#define PLAT_MARVELL_TRUSTED_RAM_SIZE 0x00C00000 /* 12 MB DRAM */
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#define PLAT_MARVELL_LLC_SRAM_BASE PLAT_MARVELL_TRUSTED_RAM_BASE
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#define PLAT_MARVELL_LLC_SRAM_BASE PLAT_MARVELL_TRUSTED_RAM_BASE
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#define PLAT_MARVELL_LLC_SRAM_SIZE 0x00100000 /* 1 MB SRAM */
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#define PLAT_MARVELL_LLC_SRAM_SIZE 0x00100000 /* 1 MB SRAM */
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