imx: imx8qm: add domain off support
Add domain off support for Linux kernel's cpu hot-plug feature, when there are cpu off request from Linux kernel, TF-A will send command to system controller to do CPU power gate accordingly, tested on i.MX8QM MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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@ -11,7 +11,8 @@
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const unsigned char imx_power_domain_tree_desc[] = {
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PWR_DOMAIN_AT_MAX_LVL,
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PLATFORM_CLUSTER_COUNT,
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PLATFORM_CORE_COUNT,
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PLATFORM_CLUSTER0_CORE_COUNT,
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PLATFORM_CLUSTER1_CORE_COUNT,
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};
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const unsigned char *plat_get_power_domain_tree_desc(void)
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@ -85,6 +85,29 @@ void imx_pwr_domain_on_finish(const psci_power_state_t *target_state)
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plat_gic_cpuif_enable();
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}
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void imx_pwr_domain_off(const psci_power_state_t *target_state)
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{
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u_register_t mpidr = read_mpidr_el1();
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unsigned int cluster_id = MPIDR_AFFLVL1_VAL(mpidr);
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unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr);
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plat_gic_cpuif_disable();
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if (cluster_id == 0) {
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sc_pm_req_cpu_low_power_mode(ipc_handle, ap_core_index[cpu_id],
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SC_PM_PW_MODE_OFF, SC_PM_WAKE_SRC_NONE);
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if (--a53_cpu_on_number == 0)
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cci_disable_snoop_dvm_reqs(0);
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} else {
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sc_pm_req_cpu_low_power_mode(ipc_handle,
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ap_core_index[cpu_id + 4],
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SC_PM_PW_MODE_OFF,
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SC_PM_WAKE_SRC_NONE);
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if (--a72_cpu_on_number == 0)
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cci_disable_snoop_dvm_reqs(1);
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}
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tf_printf("turn off cluster:%d core:%d\n", cluster_id, cpu_id);
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}
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int imx_validate_ns_entrypoint(uintptr_t ns_entrypoint)
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{
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return PSCI_E_SUCCESS;
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@ -93,6 +116,7 @@ int imx_validate_ns_entrypoint(uintptr_t ns_entrypoint)
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static const plat_psci_ops_t imx_plat_psci_ops = {
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.pwr_domain_on = imx_pwr_domain_on,
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.pwr_domain_on_finish = imx_pwr_domain_on_finish,
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.pwr_domain_off = imx_pwr_domain_off,
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.validate_ns_entrypoint = imx_validate_ns_entrypoint,
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.system_off = imx_system_off,
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.system_reset = imx_system_reset,
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@ -17,6 +17,8 @@
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#define PLATFORM_MAX_CPU_PER_CLUSTER 4
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#define PLATFORM_CLUSTER_COUNT 1
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#define PLATFORM_CORE_COUNT 4
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#define PLATFORM_CLUSTER0_CORE_COUNT 4
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#define PLATFORM_CLUSTER1_CORE_COUNT 0
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#define PWR_DOMAIN_AT_MAX_LVL 1
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#define PLAT_MAX_PWR_LVL 2
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