Merge "fix(security): update Cortex-A15 CPU lib files for CVE-2022-23960" into integration
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commit
10f7bd502e
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@ -1,5 +1,5 @@
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#
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#
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# Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2016-2022, Arm Limited and Contributors. All rights reserved.
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#
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#
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# SPDX-License-Identifier: BSD-3-Clause
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# SPDX-License-Identifier: BSD-3-Clause
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#
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#
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@ -35,6 +35,10 @@ endif
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ifeq (${WORKAROUND_CVE_2017_5715},1)
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ifeq (${WORKAROUND_CVE_2017_5715},1)
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BL32_SOURCES += bl32/sp_min/wa_cve_2017_5715_bpiall.S \
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BL32_SOURCES += bl32/sp_min/wa_cve_2017_5715_bpiall.S \
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bl32/sp_min/wa_cve_2017_5715_icache_inv.S
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bl32/sp_min/wa_cve_2017_5715_icache_inv.S
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else
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ifeq (${WORKAROUND_CVE_2022_23960},1)
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BL32_SOURCES += bl32/sp_min/wa_cve_2017_5715_icache_inv.S
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endif
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endif
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endif
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ifeq (${TRNG_SUPPORT},1)
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ifeq (${TRNG_SUPPORT},1)
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2022, Arm Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -100,6 +100,15 @@ func check_errata_cve_2017_5715
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bx lr
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bx lr
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endfunc check_errata_cve_2017_5715
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endfunc check_errata_cve_2017_5715
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func check_errata_cve_2022_23960
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#if WORKAROUND_CVE_2022_23960
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mov r0, #ERRATA_APPLIES
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#else
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mov r0, #ERRATA_MISSING
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#endif
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bx lr
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endfunc check_errata_cve_2022_23960
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#if REPORT_ERRATA
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#if REPORT_ERRATA
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/*
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/*
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* Errata printing function for Cortex A15. Must follow AAPCS.
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* Errata printing function for Cortex A15. Must follow AAPCS.
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@ -117,6 +126,7 @@ func cortex_a15_errata_report
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report_errata ERRATA_A15_816470, cortex_a15, 816470
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report_errata ERRATA_A15_816470, cortex_a15, 816470
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report_errata ERRATA_A15_827671, cortex_a15, 827671
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report_errata ERRATA_A15_827671, cortex_a15, 827671
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report_errata WORKAROUND_CVE_2017_5715, cortex_a15, cve_2017_5715
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report_errata WORKAROUND_CVE_2017_5715, cortex_a15, cve_2017_5715
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report_errata WORKAROUND_CVE_2022_23960, cortex_a15, cve_2022_23960
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pop {r12, lr}
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pop {r12, lr}
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bx lr
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bx lr
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@ -131,11 +141,11 @@ func cortex_a15_reset_func
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bl errata_a15_827671_wa
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bl errata_a15_827671_wa
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#endif
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#endif
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#if IMAGE_BL32 && WORKAROUND_CVE_2017_5715
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#if IMAGE_BL32 && (WORKAROUND_CVE_2017_5715 || WORKAROUND_CVE_2022_23960)
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ldcopr r0, ACTLR
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ldcopr r0, ACTLR
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orr r0, #CORTEX_A15_ACTLR_INV_BTB_BIT
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orr r0, #CORTEX_A15_ACTLR_INV_BTB_BIT
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stcopr r0, ACTLR
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stcopr r0, ACTLR
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ldr r0, =workaround_icache_inv_runtime_exceptions
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ldr r0, =wa_cve_2017_5715_icache_inv_vbar
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stcopr r0, VBAR
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stcopr r0, VBAR
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stcopr r0, MVBAR
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stcopr r0, MVBAR
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/* isb will be applied in the course of the reset func */
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/* isb will be applied in the course of the reset func */
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