juno: Update GIC addresses
Signed-off-by: Jon Medhurst <tixy@linaro.org>
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@ -59,7 +59,7 @@ void gicv3_cpuif_setup(void)
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* GICR_WAKER is NOT banked per CPU, compute the correct base address
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* per CPU.
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*/
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base = gicv3_get_rdist(BASE_GICR_BASE, read_mpidr());
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base = gicv3_get_rdist(GICR_BASE, read_mpidr());
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if (base == (uintptr_t)NULL) {
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/* No re-distributor base address. This interface cannot be
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* configured.
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@ -123,7 +123,7 @@ void gicv3_cpuif_deactivate(void)
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* GICR_WAKER is NOT banked per CPU, compute the correct base address
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* per CPU.
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*/
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base = gicv3_get_rdist(BASE_GICR_BASE, read_mpidr());
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base = gicv3_get_rdist(GICR_BASE, read_mpidr());
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if (base == (uintptr_t)NULL) {
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/* No re-distributor base address. This interface cannot be
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* configured.
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@ -272,11 +272,6 @@ void gic_distif_setup(unsigned int gicd_base)
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void gic_setup(void)
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{
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unsigned int gicd_base, gicc_base;
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gicd_base = platform_get_cfgvar(CONFIG_GICD_ADDR);
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gicc_base = platform_get_cfgvar(CONFIG_GICC_ADDR);
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gic_cpuif_setup(gicc_base);
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gic_distif_setup(gicd_base);
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gic_cpuif_setup(GICC_BASE);
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gic_distif_setup(GICD_BASE);
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}
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@ -171,20 +171,12 @@
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/*******************************************************************************
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* GIC-400 & interrupt handling related constants
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******************************************************************************/
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/* VE compatible GIC memory map */
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#define VE_GICD_BASE 0x2c001000
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#define VE_GICC_BASE 0x2c002000
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#define VE_GICH_BASE 0x2c004000
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#define VE_GICV_BASE 0x2c006000
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#define GICD_BASE 0x2c010000
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#define GICC_BASE 0x2c02f000
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#define GICH_BASE 0x2c04f000
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#define GICV_BASE 0x2c06f000
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/* Base FVP compatible GIC memory map */
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#define BASE_GICD_BASE 0x2f000000
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#define BASE_GICR_BASE 0x2f100000
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#define BASE_GICC_BASE 0x2c000000
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#define BASE_GICH_BASE 0x2c010000
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#define BASE_GICV_BASE 0x2c02f000
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#define IRQ_TZ_WDOG 56
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#define IRQ_TZ_WDOG 86
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#define IRQ_SEC_PHY_TIMER 29
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#define IRQ_SEC_SGI_0 8
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#define IRQ_SEC_SGI_1 9
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