Merge changes from topic "rdn1edge_dual" into integration
* changes: board/rde1edge: fix incorrect topology tree description plat/arm/sgi: introduce number of chips macro
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commit
129f80d674
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@ -114,6 +114,11 @@ Arm CSS Platform-Specific Build Options
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management operations and for SCP RAM Firmware transfer. If this option
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is set to 1, then SCMI/SDS drivers will be used. Default is 0.
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- ``CSS_SGI_CHIP_COUNT``: Configures the number of chips on a SGI/RD platform
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which supports multi-chip operation. If ``CSS_SGI_CHIP_COUNT`` is set to any
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valid value greater than 1, the platform code performs required configuration
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to support multi-chip operation.
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--------------
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*Copyright (c) 2019-2020, Arm Limited. All rights reserved.*
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@ -47,4 +47,9 @@ NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
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# Add the NT_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
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ifneq ($(CSS_SGI_CHIP_COUNT),1)
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$(error "Chip count for RDE1Edge should be 1, currently set to \
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${CSS_SGI_CHIP_COUNT}.")
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endif
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override CTX_INCLUDE_AARCH32_REGS := 0
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@ -7,12 +7,15 @@
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#include <plat/arm/common/plat_arm.h>
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/******************************************************************************
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* The power domain tree descriptor.
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* The power domain tree descriptor. RD-E1-Edge platform consists of two
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* clusters with eight CPUs in each cluster. The CPUs are multi-threaded with
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* two threads per CPU.
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******************************************************************************/
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static const unsigned char rde1edge_pd_tree_desc[] = {
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CSS_SGI_CHIP_COUNT,
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PLAT_ARM_CLUSTER_COUNT,
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CSS_SGI_MAX_CPUS_PER_CLUSTER,
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CSS_SGI_MAX_CPUS_PER_CLUSTER
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CSS_SGI_MAX_CPUS_PER_CLUSTER * CSS_SGI_MAX_PE_PER_CPU,
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CSS_SGI_MAX_CPUS_PER_CLUSTER * CSS_SGI_MAX_PE_PER_CPU
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};
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/******************************************************************************
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@ -47,4 +47,9 @@ NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
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# Add the NT_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
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ifneq ($(CSS_SGI_CHIP_COUNT),1)
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$(error "Chip count for RDN1Edge should be 1, currently set to \
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${CSS_SGI_CHIP_COUNT}.")
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endif
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override CTX_INCLUDE_AARCH32_REGS := 0
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@ -46,3 +46,8 @@ NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
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# Add the NT_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
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ifneq ($(CSS_SGI_CHIP_COUNT),1)
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$(error "Chip count for SGI575 should be 1, currently set to \
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${CSS_SGI_CHIP_COUNT}.")
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endif
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@ -16,6 +16,8 @@ EL3_EXCEPTION_HANDLING := 0
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HANDLE_EA_EL3_FIRST := 0
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CSS_SGI_CHIP_COUNT := 1
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INTERCONNECT_SOURCES := ${CSS_ENT_BASE}/sgi_interconnect.c
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PLAT_INCLUDES += -I${CSS_ENT_BASE}/include
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@ -52,6 +54,8 @@ endif
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$(eval $(call add_define,SGI_PLAT))
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$(eval $(call add_define,CSS_SGI_CHIP_COUNT))
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override CSS_LOAD_SCP_IMAGES := 0
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override NEED_BL2U := no
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override ARM_BL31_IN_DRAM := 1
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