plat: marvell: t9130: add SVC support
As the preparation for adding the CN913x SoC family support introduce code that enable SVC and the frequency handling specific for the AP807 North Bridge. Change-Id: Ibe34a511b49cd9671a2e53b77bdcfc644bb915e3 Signed-off-by: Alex Evraev <alexev@marvell.com>
This commit is contained in:
Alex Evraev
Marcin Wojtas
parent
885cd821f8
commit
12c66c6b48
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@ -110,7 +110,6 @@
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#define EFUSE_AP_LD0_REVID_MASK 0xF
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#define EFUSE_AP_LD0_BIN_OFFS 16 /* LD0[80:79] */
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#define EFUSE_AP_LD0_BIN_MASK 0x3
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#define EFUSE_AP_LD0_SWREV_OFFS 50 /* LD0[115:113] */
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#define EFUSE_AP_LD0_SWREV_MASK 0x7
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#ifndef MVEBU_SOC_AP807
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@ -124,16 +123,18 @@
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#define EFUSE_AP_LD0_SVC2_OFFS 26 /* LD0[96:89] */
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#define EFUSE_AP_LD0_SVC3_OFFS 34 /* LD0[104:97] */
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#define EFUSE_AP_LD0_WP_MASK 0xFF
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#define EFUSE_AP_LD0_SWREV_OFFS 50 /* LD0[115:113] */
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#else
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/* AP807 AVS work points in the LD0 eFuse
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* SVC1 work point: LD0[91:81]
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* SVC2 work point: LD0[102:92]
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* SVC3 work point: LD0[113:103]
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*/
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#define EFUSE_AP_LD0_SVC1_OFFS 17 /* LD0[91:81] */
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#define EFUSE_AP_LD0_SVC2_OFFS 28 /* LD0[102:92] */
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#define EFUSE_AP_LD0_SVC3_OFFS 39 /* LD0[113:103] */
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#define EFUSE_AP_LD0_WP_MASK 0x3FF
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#define EFUSE_AP_LD0_SVC1_OFFS 18 /* LD0[91:81] */
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#define EFUSE_AP_LD0_SVC2_OFFS 29 /* LD0[102:92] */
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#define EFUSE_AP_LD0_SVC3_OFFS 40 /* LD0[113:103] */
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#define EFUSE_AP_LD0_WP_MASK 0x7FF /* 10 data,1 parity */
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#define EFUSE_AP_LD0_SWREV_OFFS 51 /* LD0[116:114] */
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#endif
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#define EFUSE_AP_LD0_SVC4_OFFS 42 /* LD0[112:105] */
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@ -216,7 +217,9 @@ static void ble_plat_avs_config(void)
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FREQ_MODE_AP_SAR_REG_NUM)));
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/* Check which SoC is running and act accordingly */
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if (ble_get_ap_type() == CHIP_ID_AP807) {
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avs_val = AVS_AP807_CLK_VALUE;
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} else {
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/* Check which SoC is running and act accordingly */
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device_id = cp110_device_id_get(MVEBU_CP_REGS_BASE(0));
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@ -370,6 +373,7 @@ static void ble_plat_svc_config(void)
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uint64_t efuse;
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uint32_t device_id, single_cluster;
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uint16_t svc[4], perr[4], i, sw_ver;
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uint8_t avs_data_bits, min_sw_ver, svc_fields;
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unsigned int ap_type;
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/* Set access to LD0 */
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@ -423,22 +427,28 @@ static void ble_plat_svc_config(void)
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& EFUSE_AP_LD0_WP_MASK;
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INFO("SVC: Efuse WP: [0]=0x%x, [1]=0x%x, [2]=0x%x, [3]=0x%x\n",
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svc[0], svc[1], svc[2], svc[3]);
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avs_data_bits = 7;
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min_sw_ver = 2; /* parity check from sw revision 2 */
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svc_fields = 4;
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} else {
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INFO("SVC: Efuse WP: [0]=0x%x, [1]=0x%x, [2]=0x%x\n",
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svc[0], svc[1], svc[2]);
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avs_data_bits = 10;
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min_sw_ver = 1; /* parity check required from sw revision 1 */
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svc_fields = 3;
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}
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/* Validate parity of SVC workpoint values */
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for (i = 0; i < 4; i++) {
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for (i = 0; i < svc_fields; i++) {
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uint8_t parity, bit;
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perr[i] = 0;
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for (bit = 1, parity = svc[i] & 1; bit < 7; bit++)
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for (bit = 1, parity = (svc[i] & 1); bit < avs_data_bits; bit++)
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parity ^= (svc[i] >> bit) & 1;
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/* Starting from SW version 2, the parity check is mandatory */
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if ((sw_ver > 1) && (parity != ((svc[i] >> 7) & 1)))
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/* From SW version 1 or 2 (AP806/AP807), check parity */
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if ((sw_ver >= min_sw_ver) &&
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(parity != ((svc[i] >> avs_data_bits) & 1)))
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perr[i] = 1; /* register the error */
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}
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@ -537,7 +547,8 @@ static void ble_plat_svc_config(void)
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NOTICE("7040 1600Mhz, avs = 0x%x\n",
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avs_workpoint);
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#else
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avs_workpoint = 0;
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NOTICE("SVC: AVS work point not changed\n");
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return;
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#endif
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}
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break;
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@ -562,6 +573,31 @@ static void ble_plat_svc_config(void)
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avs_workpoint = svc[0];
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break;
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}
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} else if (device_id == MVEBU_CN9130_DEV_ID) {
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NOTICE("SVC: DEV ID: %s, FREQ Mode: 0x%x\n",
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"CN913x", freq_pidi_mode);
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switch (freq_pidi_mode) {
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case CPU_2200_DDR_1200_RCLK_1200:
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if (perr[0])
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goto perror;
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avs_workpoint = svc[0];
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break;
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case CPU_2000_DDR_1200_RCLK_1200:
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if (perr[1])
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goto perror;
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avs_workpoint = svc[1];
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break;
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case CPU_1600_DDR_1200_RCLK_1200:
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if (perr[2])
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goto perror;
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avs_workpoint = svc[2];
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break;
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default:
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ERROR("SVC: Unsupported Frequency 0x%x\n",
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freq_pidi_mode);
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return;
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}
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} else {
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ERROR("SVC: Unsupported Device ID 0x%x\n", device_id);
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return;
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@ -569,13 +605,17 @@ static void ble_plat_svc_config(void)
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/* Set AVS control if needed */
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if (avs_workpoint == 0) {
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ERROR("SVC: AVS work point not changed\n");
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ERROR("SVC: You are using a frequency setup which is\n");
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ERROR("Not supported by this device\n");
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ERROR("This may result in malfunction of the device\n");
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return;
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}
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/* Remove parity bit */
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if (ap_type != CHIP_ID_AP807)
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avs_workpoint &= 0x7F;
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else
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avs_workpoint &= 0x3FF;
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/* Update WP from EEPROM if needed */
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avs_workpoint = avs_update_from_eeprom(avs_workpoint);
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