errata: workaround for Neoverse V1 errata 1852267

Neoverse V1 erratum 1852267 is a Cat B erratum present in r0p0 and
r1p0 of the V1 processor core. It is fixed in r1p1.

SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ide5e0bc09371fbc91c2385ffdff74e604beb2dbe
This commit is contained in:
laurenw-arm 2021-08-02 14:40:08 -05:00
parent 4789cf66af
commit 143b19651b
4 changed files with 47 additions and 0 deletions

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@ -333,6 +333,10 @@ For Neoverse V1, the following errata build flags are defined :
CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
in r1p1. in r1p1.
- ``ERRATA_V1_1852267``: This applies errata 1852267 workaround to Neoverse-V1
CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
in r1p1.
- ``ERRATA_V1_1940577``: This applies errata 1940577 workaround to Neoverse-V1 - ``ERRATA_V1_1940577``: This applies errata 1940577 workaround to Neoverse-V1
CPU. This needs to be enabled only for revision r1p0 and r1p1 of the CPU. This needs to be enabled only for revision r1p0 and r1p1 of the
CPU. CPU.

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@ -26,5 +26,6 @@
******************************************************************************/ ******************************************************************************/
#define NEOVERSE_V1_ACTLR2_EL1 S3_0_C15_C1_1 #define NEOVERSE_V1_ACTLR2_EL1 S3_0_C15_C1_1
#define NEOVERSE_V1_ACTLR2_EL1_BIT_2 (ULL(1) << 2) #define NEOVERSE_V1_ACTLR2_EL1_BIT_2 (ULL(1) << 2)
#define NEOVERSE_V1_ACTLR2_EL1_BIT_28 (ULL(1) << 28)
#endif /* NEOVERSE_V1_H */ #endif /* NEOVERSE_V1_H */

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@ -77,6 +77,34 @@ func check_errata_1791573
b cpu_rev_var_ls b cpu_rev_var_ls
endfunc check_errata_1791573 endfunc check_errata_1791573
/* --------------------------------------------------
* Errata Workaround for Neoverse V1 Errata #1852267.
* This applies to revisions r0p0 and r1p0, fixed in r1p1.
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* --------------------------------------------------
*/
func errata_neoverse_v1_1852267_wa
/* Check workaround compatibility. */
mov x17, x30
bl check_errata_1852267
cbz x0, 1f
/* Set bit 28 in ACTLR2_EL1 */
mrs x1, NEOVERSE_V1_ACTLR2_EL1
orr x1, x1, #NEOVERSE_V1_ACTLR2_EL1_BIT_28
msr NEOVERSE_V1_ACTLR2_EL1, x1
isb
1:
ret x17
endfunc errata_neoverse_v1_1852267_wa
func check_errata_1852267
/* Applies to r0p0 and r1p0. */
mov x1, #0x10
b cpu_rev_var_ls
endfunc check_errata_1852267
/* -------------------------------------------------- /* --------------------------------------------------
* Errata Workaround for Neoverse V1 Erratum #1940577 * Errata Workaround for Neoverse V1 Erratum #1940577
* This applies to revisions r1p0 - r1p1 and is open. * This applies to revisions r1p0 - r1p1 and is open.
@ -164,6 +192,7 @@ func neoverse_v1_errata_report
*/ */
report_errata ERRATA_V1_1774420, neoverse_v1, 1774420 report_errata ERRATA_V1_1774420, neoverse_v1, 1774420
report_errata ERRATA_V1_1791573, neoverse_v1, 1791573 report_errata ERRATA_V1_1791573, neoverse_v1, 1791573
report_errata ERRATA_V1_1852267, neoverse_v1, 1852267
report_errata ERRATA_V1_1940577, neoverse_v1, 1940577 report_errata ERRATA_V1_1940577, neoverse_v1, 1940577
ldp x8, x30, [sp], #16 ldp x8, x30, [sp], #16
@ -188,6 +217,11 @@ func neoverse_v1_reset_func
bl errata_neoverse_v1_1791573_wa bl errata_neoverse_v1_1791573_wa
#endif #endif
#if ERRATA_V1_1852267
mov x0, x18
bl errata_neoverse_v1_1852267_wa
#endif
#if ERRATA_V1_1940577 #if ERRATA_V1_1940577
mov x0, x18 mov x0, x18
bl errata_neoverse_v1_1940577_wa bl errata_neoverse_v1_1940577_wa

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@ -380,6 +380,10 @@ ERRATA_V1_1774420 ?=0
# to revisions r0p0 and r1p0 of the Neoverse V1 core, and was fixed in r1p1. # to revisions r0p0 and r1p0 of the Neoverse V1 core, and was fixed in r1p1.
ERRATA_V1_1791573 ?=0 ERRATA_V1_1791573 ?=0
# Flag to apply erratum 1852267 workaround during reset. This erratum applies
# to revisions r0p0 and r1p0 of the Neoverse V1 core, and was fixed in r1p1.
ERRATA_V1_1852267 ?=0
# Flag to apply erratum 1940577 workaround during reset. This erratum applies # Flag to apply erratum 1940577 workaround during reset. This erratum applies
# to revisions r1p0 and r1p1 of the Neoverse V1 cpu. # to revisions r1p0 and r1p1 of the Neoverse V1 cpu.
ERRATA_V1_1940577 ?=0 ERRATA_V1_1940577 ?=0
@ -697,6 +701,10 @@ $(eval $(call add_define,ERRATA_V1_1774420))
$(eval $(call assert_boolean,ERRATA_V1_1791573)) $(eval $(call assert_boolean,ERRATA_V1_1791573))
$(eval $(call add_define,ERRATA_V1_1791573)) $(eval $(call add_define,ERRATA_V1_1791573))
# Process ERRATA_V1_1852267 flag
$(eval $(call assert_boolean,ERRATA_V1_1852267))
$(eval $(call add_define,ERRATA_V1_1852267))
# Process ERRATA_V1_1940577 flag # Process ERRATA_V1_1940577 flag
$(eval $(call assert_boolean,ERRATA_V1_1940577)) $(eval $(call assert_boolean,ERRATA_V1_1940577))
$(eval $(call add_define,ERRATA_V1_1940577)) $(eval $(call add_define,ERRATA_V1_1940577))