Update meson platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: Ib7ec8ed3423e9b9b32be2388520bc27ee28f6370 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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@ -104,8 +104,8 @@ struct asd_desc {
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#define ASD_DESC_ERR_SET(d, v) \
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(ASD_DESC_SET((d)->cfg, v, ASD_DESC_ERR_MASK, ASD_DESC_ERR_OFF))
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#define ASD_DESC_OWNER_OFF 31
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#define ASD_DESC_OWNER_MASK 0x1
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#define ASD_DESC_OWNER_OFF 31u
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#define ASD_DESC_OWNER_MASK 0x1u
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#define ASD_DESC_OWNER(d) \
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(ASD_DESC_GET((d)->cfg, ASD_DESC_OWNER_MASK, ASD_DESC_OWNER_OFF))
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#define ASD_DESC_OWNER_SET(d, v) \
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@ -126,7 +126,7 @@ static void asd_compute_sha(struct asd_ctx *ctx, void *data, size_t len,
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assert((uintptr_t)&desc == (uintptr_t)&desc);
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ASD_DESC_LEN_SET(&desc, len);
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ASD_DESC_OWNER_SET(&desc, 1);
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ASD_DESC_OWNER_SET(&desc, 1u);
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ASD_DESC_ENCONLY_SET(&desc, 1);
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ASD_DESC_EOD_SET(&desc, 1);
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if (ctx->started == 0) {
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