Hikey960: configure pins for PCIe controller
GPIO_089 connects to PCIE_PERST_N. It needs to be configured as output low. Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com> Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
This commit is contained in:
Kaihua Zhong
Haojian Zhuang
parent
cffb003428
commit
16bec9c25b
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@ -211,6 +211,7 @@ void bl1_platform_setup(void)
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hikey960_peri_init();
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hikey960_ufs_init();
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hikey960_pinmux_init();
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hikey960_gpio_init();
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hikey960_io_setup();
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}
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@ -328,6 +328,7 @@ void bl2_platform_setup(void)
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hikey960_tzc_init();
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hikey960_peri_init();
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hikey960_pinmux_init();
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hikey960_gpio_init();
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hikey960_init_ufs();
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hikey960_io_setup();
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}
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@ -8,6 +8,7 @@
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#include <delay_timer.h>
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#include <hi3660.h>
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#include <mmio.h>
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#include <pl061_gpio.h>
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#include "hikey960_private.h"
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@ -439,3 +440,34 @@ void hikey960_pinmux_init(void)
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/* GPIO213 - PCIE_CLKREQ_N */
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mmio_write_32(IOMG_AO_033_REG, 1);
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}
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void hikey960_gpio_init(void)
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{
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pl061_gpio_init();
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pl061_gpio_register(GPIO0_BASE, 0);
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pl061_gpio_register(GPIO1_BASE, 1);
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pl061_gpio_register(GPIO2_BASE, 2);
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pl061_gpio_register(GPIO3_BASE, 3);
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pl061_gpio_register(GPIO4_BASE, 4);
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pl061_gpio_register(GPIO5_BASE, 5);
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pl061_gpio_register(GPIO6_BASE, 6);
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pl061_gpio_register(GPIO7_BASE, 7);
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pl061_gpio_register(GPIO8_BASE, 8);
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pl061_gpio_register(GPIO9_BASE, 9);
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pl061_gpio_register(GPIO10_BASE, 10);
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pl061_gpio_register(GPIO11_BASE, 11);
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pl061_gpio_register(GPIO12_BASE, 12);
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pl061_gpio_register(GPIO13_BASE, 13);
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pl061_gpio_register(GPIO14_BASE, 14);
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pl061_gpio_register(GPIO15_BASE, 15);
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pl061_gpio_register(GPIO16_BASE, 16);
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pl061_gpio_register(GPIO17_BASE, 17);
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pl061_gpio_register(GPIO18_BASE, 18);
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pl061_gpio_register(GPIO19_BASE, 19);
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pl061_gpio_register(GPIO20_BASE, 20);
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pl061_gpio_register(GPIO21_BASE, 21);
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/* PCIE_PERST_N output low */
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gpio_set_direction(89, GPIO_DIR_OUT);
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gpio_set_value(89, GPIO_LEVEL_LOW);
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}
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@ -32,6 +32,7 @@ void hikey960_regulator_enable(void);
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void hikey960_tzc_init(void);
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void hikey960_peri_init(void);
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void hikey960_pinmux_init(void);
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void hikey960_gpio_init(void);
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void set_retention_ticks(unsigned int val);
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void clr_retention_ticks(unsigned int val);
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void clr_ex(void);
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@ -240,6 +240,27 @@
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#define PCTRL_PERI_CTRL3_REG (PCTRL_REG_BASE + 0x010)
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#define PCTRL_PERI_CTRL24_REG (PCTRL_REG_BASE + 0x064)
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#define GPIO0_BASE UL(0xE8A0B000)
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#define GPIO1_BASE UL(0xE8A0C000)
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#define GPIO2_BASE UL(0xE8A0D000)
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#define GPIO3_BASE UL(0xE8A0E000)
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#define GPIO4_BASE UL(0xE8A0F000)
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#define GPIO5_BASE UL(0xE8A10000)
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#define GPIO6_BASE UL(0xE8A11000)
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#define GPIO7_BASE UL(0xE8A12000)
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#define GPIO8_BASE UL(0xE8A13000)
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#define GPIO9_BASE UL(0xE8A14000)
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#define GPIO10_BASE UL(0xE8A15000)
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#define GPIO11_BASE UL(0xE8A16000)
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#define GPIO12_BASE UL(0xE8A17000)
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#define GPIO13_BASE UL(0xE8A18000)
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#define GPIO14_BASE UL(0xE8A19000)
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#define GPIO15_BASE UL(0xE8A1A000)
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#define GPIO16_BASE UL(0xE8A1B000)
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#define GPIO17_BASE UL(0xE8A1C000)
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#define GPIO20_BASE UL(0xE8A1F000)
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#define GPIO21_BASE UL(0xE8A20000)
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#define TZC_REG_BASE 0xE8A21000
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#define TZC_STAT0_REG (TZC_REG_BASE + 0x800)
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#define TZC_EN0_REG (TZC_REG_BASE + 0x804)
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@ -316,6 +337,9 @@
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#define MASK_UFS_DEVICE_RESET (1 << 16)
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#define BIT_UFS_DEVICE_RESET (1 << 0)
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#define GPIO18_BASE UL(0xFF3B4000)
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#define GPIO19_BASE UL(0xFF3B5000)
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#define IOMG_FIX_REG_BASE 0xFF3B6000
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/* GPIO150: LED */
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@ -22,12 +22,14 @@ endif
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CRASH_CONSOLE_BASE := PL011_UART6_BASE
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COLD_BOOT_SINGLE_CPU := 1
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PLAT_PL061_MAX_GPIOS := 176
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PROGRAMMABLE_RESET_ADDRESS := 1
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ENABLE_SVE_FOR_NS := 0
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# Process flags
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$(eval $(call add_define,HIKEY960_TSP_RAM_LOCATION_ID))
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$(eval $(call add_define,CRASH_CONSOLE_BASE))
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$(eval $(call add_define,PLAT_PL061_MAX_GPIOS))
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# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
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# in the FIP if the platform requires.
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@ -58,6 +60,8 @@ HIKEY960_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
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plat/common/plat_gicv2.c
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BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \
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drivers/arm/pl061/pl061_gpio.c \
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drivers/gpio/gpio.c \
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drivers/io/io_block.c \
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drivers/io/io_fip.c \
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drivers/io/io_storage.c \
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@ -71,6 +75,8 @@ BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \
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${HIKEY960_GIC_SOURCES}
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BL2_SOURCES += common/desc_image_load.c \
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drivers/arm/pl061/pl061_gpio.c \
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drivers/gpio/gpio.c \
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drivers/io/io_block.c \
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drivers/io/io_fip.c \
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drivers/io/io_storage.c \
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