From 196231425e14afa6ae8c7c2693a99ba206b8d91e Mon Sep 17 00:00:00 2001 From: Achin Gupta Date: Tue, 17 Jun 2014 16:59:13 +0100 Subject: [PATCH] Add barriers to handle Secure Timer interrupts correctly This patch adds instruction synchronization barriers around the code which handles the timer interrupt in the TSP. This ensures that the interrupt is not acknowledged after or EOIed before it is deactivated at the peripheral. Change-Id: Ie2f01f4f2e5c032ba61c7014d09ad86a3c5a0b97 --- bl32/tsp/tsp_timer.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/bl32/tsp/tsp_timer.c b/bl32/tsp/tsp_timer.c index a7fdfdafc..e2b3e970d 100644 --- a/bl32/tsp/tsp_timer.c +++ b/bl32/tsp/tsp_timer.c @@ -68,9 +68,14 @@ void tsp_generic_timer_handler(void) /* Ensure that the timer did assert the interrupt */ assert(get_cntp_ctl_istatus(read_cntps_ctl_el1())); - /* Disable the timer and reprogram it */ + /* + * Disable the timer and reprogram it. The barriers ensure that there is + * no reordering of instructions around the reprogramming code. + */ + isb(); write_cntps_ctl_el1(0); tsp_generic_timer_start(); + isb(); } /*******************************************************************************