Merge "Remove redundant declarations." into integration
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1ab2dc1a55
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@ -30,9 +30,6 @@
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#pragma weak plat_set_nv_ctr2
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/* Pointer to CoT */
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extern const auth_img_desc_t *const *const cot_desc_ptr;
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extern unsigned int auth_img_flags[MAX_NUMBER_IDS];
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static int cmp_auth_param_type_desc(const auth_param_type_desc_t *a,
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const auth_param_type_desc_t *b)
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@ -28,9 +28,6 @@
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extern int32_t plat_get_drv_source(uint32_t id, uintptr_t *dev,
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uintptr_t *image_spec);
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extern int auth_mod_verify_img(unsigned int img_id, void *ptr,
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unsigned int len);
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static int32_t rcar_dev_open(const uintptr_t dev_spec __attribute__ ((unused)),
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io_dev_info_t **dev_info);
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static int32_t rcar_dev_close(io_dev_info_t *dev_info);
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@ -15,13 +15,9 @@ int imx_pwr_domain_on(u_register_t mpidr);
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void imx_pwr_domain_on_finish(const psci_power_state_t *target_state);
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void imx_pwr_domain_off(const psci_power_state_t *target_state);
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int imx_validate_ns_entrypoint(uintptr_t ns_entrypoint);
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int imx_validate_power_state(unsigned int power_state, psci_power_state_t *rq_state);
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void imx_cpu_standby(plat_local_state_t cpu_state);
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void imx_domain_suspend(const psci_power_state_t *target_state);
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void imx_domain_suspend_finish(const psci_power_state_t *target_state);
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void imx_get_sys_suspend_power_state(psci_power_state_t *req_state);
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void __dead2 imx_system_reset(void);
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void __dead2 imx_system_off(void);
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void __dead2 imx_pwr_domain_pwr_down_wfi(const psci_power_state_t *target_state);
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#endif /* IMX8M_PSCI_H */
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@ -73,7 +73,6 @@
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#define DISABLE_BRIDGE_FIREWALL 0x0ffe0101
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#define DISABLE_L4_FIREWALL (BIT(0) | BIT(16) | BIT(24))
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void enable_nonsecure_access(void);
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void enable_ns_bridge_access(void);
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#endif
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@ -69,5 +69,3 @@
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#define DISABLE_L4_FIREWALL (BIT(0) | BIT(16) | BIT(24))
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void enable_nonsecure_access(void);
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@ -320,7 +320,6 @@ void spm_register_init(void);
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void spm_go_to_hotplug(void);
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void spm_init_event_vector(const struct pcm_desc *pcmdesc);
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void spm_kick_im_to_fetch(const struct pcm_desc *pcmdesc);
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void spm_set_sysclk_settle(void);
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int is_mcdi_ready(void);
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int is_hotplug_ready(void);
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int is_suspend_ready(void);
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@ -137,7 +137,6 @@ int32_t bl31_check_ns_address(uint64_t base, uint64_t size_in_bytes);
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void tegra_delay_timer_init(void);
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void tegra_secure_entrypoint(void);
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void tegra186_cpu_reset_handler(void);
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/* Declarations for tegra_sip_calls.c */
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uintptr_t tegra_sip_handler(uint32_t smc_fid,
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@ -66,7 +66,6 @@ uint64_t nvg_get_result(void);
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uint64_t nvg_cache_clean(void);
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uint64_t nvg_cache_clean_inval(void);
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uint64_t nvg_cache_inval_all(void);
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int32_t nvg_roc_clean_cache_trbits(void);
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void nvg_enable_strict_checking_mode(void);
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/* MCE helper functions */
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@ -26,7 +26,6 @@
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#include <tegra_platform.h>
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#include <tegra_private.h>
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extern void tegra194_cpu_reset_handler(void);
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extern uint32_t __tegra194_cpu_reset_handler_data,
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__tegra194_cpu_reset_handler_end;
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@ -16,8 +16,6 @@
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#define TIMER_INTSTATUS 0x18
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#define TIMER_EN 0x1
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extern const unsigned char rockchip_power_domain_tree_desc[];
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/**************************** read/write **************************************/
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#ifndef BITS_WMSK
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#define BITS_WMSK(msk, shift) ((msk) << (shift + REG_MSK_SHIFT))
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