Cortex-A55: Implement workaround for erratum 768277
Change-Id: Iebd45ef5e39ee7080235fb85414ce5b2e776f90c Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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@ -97,6 +97,11 @@ For Cortex-A53, the following errata build flags are defined :
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Earlier revisions of the CPU have other errata which require the same
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workaround in software, so they should be covered anyway.
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For Cortex-A55, the following errata build flags are defined :
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- ``ERRATA_A55_768277``: This applies errata 768277 workaround to Cortex-A55
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CPU. This needs to be enabled only for revision r0p0 of the CPU.
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For Cortex-A57, the following errata build flags are defined :
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- ``ERRATA_A57_806969``: This applies errata 806969 workaround to Cortex-A57
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@ -18,6 +18,13 @@
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#define CORTEX_A55_CPUPWRCTLR_EL1 S3_0_C15_C2_7
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#define CORTEX_A55_CPUECTLR_EL1 S3_0_C15_C1_4
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/*******************************************************************************
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* CPU Auxiliary Control register specific definitions.
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******************************************************************************/
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#define CORTEX_A55_CPUACTLR_EL1 S3_0_C15_C1_0
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#define CORTEX_A55_CPUACTLR_EL1_DISABLE_DUAL_ISSUE (ULL(1) << 31)
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/* Definitions of register field mask in CORTEX_A55_CPUPWRCTLR_EL1 */
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#define CORTEX_A55_CORE_PWRDN_EN_MASK U(0x1)
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -11,11 +11,49 @@
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#include <cpu_macros.S>
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#include <plat_macros.S>
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/* --------------------------------------------------
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* Errata Workaround for Cortex A55 Errata #768277.
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* This applies only to revision r0p0 of Cortex A55.
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* Inputs:
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* x0: variant[4:7] and revision[0:3] of current cpu.
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* Shall clobber: x0-x17
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* --------------------------------------------------
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*/
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func errata_a55_768277_wa
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/*
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* Compare x0 against revision r0p0
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*/
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mov x17, x30
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bl check_errata_768277
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cbz x0, 1f
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mrs x1, CORTEX_A55_CPUACTLR_EL1
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orr x1, x1, #CORTEX_A55_CPUACTLR_EL1_DISABLE_DUAL_ISSUE
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msr CORTEX_A55_CPUACTLR_EL1, x1
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isb
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1:
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ret x17
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endfunc errata_a55_768277_wa
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func check_errata_768277
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mov x1, #0x00
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b cpu_rev_var_ls
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endfunc check_errata_768277
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func cortex_a55_reset_func
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mov x19, x30
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#if ERRATA_DSU_936184
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bl errata_dsu_936184_wa
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#endif
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bl cpu_get_rev_var
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mov x18, x0
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#if ERRATA_A55_768277
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mov x0, x18
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bl errata_a55_768277_wa
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#endif
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ret x19
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endfunc cortex_a55_reset_func
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@ -49,6 +87,7 @@ func cortex_a55_errata_report
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* "report_errata" is expecting it and it doesn't corrupt it.
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*/
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report_errata ERRATA_DSU_936184, cortex_a55, dsu_936184
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report_errata ERRATA_A55_768277, cortex_a55, 768277
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ldp x8, x30, [sp], #16
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ret
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@ -79,6 +79,10 @@ ERRATA_A53_843419 ?=0
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# of by the rich OS.
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ERRATA_A53_855873 ?=0
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# Flag to apply erratum 768277 workaround during reset. This erratum applies
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# only to revision r0p0 of the Cortex A55 cpu.
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ERRATA_A55_768277 ?=0
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# Flag to apply erratum 806969 workaround during reset. This erratum applies
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# only to revision r0p0 of the Cortex A57 cpu.
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ERRATA_A57_806969 ?=0
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@ -148,6 +152,10 @@ $(eval $(call add_define,ERRATA_A53_843419))
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$(eval $(call assert_boolean,ERRATA_A53_855873))
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$(eval $(call add_define,ERRATA_A53_855873))
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# Process ERRATA_A55_768277 flag
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$(eval $(call assert_boolean,ERRATA_A55_768277))
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$(eval $(call add_define,ERRATA_A55_768277))
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# Process ERRATA_A57_806969 flag
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$(eval $(call assert_boolean,ERRATA_A57_806969))
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$(eval $(call add_define,ERRATA_A57_806969))
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