diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h
index dd4559ffd..6fde3b5ba 100644
--- a/plat/st/stm32mp1/stm32mp1_def.h
+++ b/plat/st/stm32mp1/stm32mp1_def.h
@@ -431,7 +431,17 @@ enum ddr_type {
 
 /* OTP mask */
 /* CFG0 */
+#if STM32MP13
+#define CFG0_OTP_MODE_MASK		GENMASK_32(9, 0)
+#define CFG0_OTP_MODE_SHIFT		0
+#define CFG0_OPEN_DEVICE		0x17U
+#define CFG0_CLOSED_DEVICE		0x3FU
+#define CFG0_CLOSED_DEVICE_NO_BOUNDARY_SCAN	0x17FU
+#define CFG0_CLOSED_DEVICE_NO_JTAG	0x3FFU
+#endif
+#if STM32MP15
 #define CFG0_CLOSED_DEVICE		BIT(6)
+#endif
 
 /* PART NUMBER */
 #if STM32MP13
diff --git a/plat/st/stm32mp1/stm32mp1_private.c b/plat/st/stm32mp1/stm32mp1_private.c
index 738cd8cc4..a9b9f4c5a 100644
--- a/plat/st/stm32mp1/stm32mp1_private.c
+++ b/plat/st/stm32mp1/stm32mp1_private.c
@@ -549,7 +549,23 @@ bool stm32mp_is_closed_device(void)
 		return true;
 	}
 
+#if STM32MP13
+	value = (value & CFG0_OTP_MODE_MASK) >> CFG0_OTP_MODE_SHIFT;
+
+	switch (value) {
+	case CFG0_OPEN_DEVICE:
+		return false;
+	case CFG0_CLOSED_DEVICE:
+	case CFG0_CLOSED_DEVICE_NO_BOUNDARY_SCAN:
+	case CFG0_CLOSED_DEVICE_NO_JTAG:
+		return true;
+	default:
+		panic();
+	}
+#endif
+#if STM32MP15
 	return (value & CFG0_CLOSED_DEVICE) == CFG0_CLOSED_DEVICE;
+#endif
 }
 
 /* Return true when device supports secure boot */