diff --git a/plat/nvidia/tegra/include/t194/tegra_def.h b/plat/nvidia/tegra/include/t194/tegra_def.h
index bdfa05145..8405f506e 100644
--- a/plat/nvidia/tegra/include/t194/tegra_def.h
+++ b/plat/nvidia/tegra/include/t194/tegra_def.h
@@ -65,6 +65,7 @@
 #define MC_GSC_BASE_LO_MASK		0xFFFFF
 #define MC_GSC_BASE_HI_SHIFT		0
 #define MC_GSC_BASE_HI_MASK		3
+#define MC_GSC_ENABLE_CPU_SECURE_BIT    (U(1) << 31)
 
 /* TZDRAM carveout configuration registers */
 #define MC_SECURITY_CFG0_0		0x70
@@ -95,7 +96,10 @@
 #define MC_TZRAM_BASE_LO		0x2194
 #define MC_TZRAM_BASE_HI		0x2198
 #define MC_TZRAM_SIZE			0x219C
-#define MC_TZRAM_CLIENT_ACCESS_CFG0	0x21A0
+#define MC_TZRAM_CLIENT_ACCESS0_CFG0	U(0x21A0)
+#define MC_TZRAM_CLIENT_ACCESS1_CFG0	U(0x21A4)
+#define  TZRAM_ALLOW_MPCORER		(U(1) << 7)
+#define  TZRAM_ALLOW_MPCOREW		(U(1) << 25)
 
 /* Memory Controller Reset Control registers */
 #define  MC_CLIENT_HOTRESET_CTRL1_DLAA_FLUSH_ENB	(1 << 28)