Add librom support in FVP

Change-Id: Idb9ba3864d6de3053260724f07172fd32c1523e0
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
This commit is contained in:
Roberto Vargas 2018-05-23 09:27:06 +01:00
parent 5accce5bcc
commit 1eb735d753
9 changed files with 91 additions and 5 deletions

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@ -71,9 +71,12 @@
#elif defined(IMAGE_BL32)
# define PLAT_ARM_MMAP_ENTRIES 8
# define MAX_XLAT_TABLES 5
#else
#elif !USE_ROMLIB
# define PLAT_ARM_MMAP_ENTRIES 11
# define MAX_XLAT_TABLES 5
#else
# define PLAT_ARM_MMAP_ENTRIES 12
# define MAX_XLAT_TABLES 6
#endif
/*
@ -82,6 +85,18 @@
*/
#define PLAT_ARM_MAX_BL1_RW_SIZE 0xB000
/*
* PLAT_ARM_MAX_ROMLIB_RW_SIZE is define to use a full page
*/
#if USE_ROMLIB
#define PLAT_ARM_MAX_ROMLIB_RW_SIZE 0x1000
#define PLAT_ARM_MAX_ROMLIB_RO_SIZE 0xe000
#else
#define PLAT_ARM_MAX_ROMLIB_RW_SIZE 0
#define PLAT_ARM_MAX_ROMLIB_RO_SIZE 0
#endif
/*
* PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a
* little space for growth.

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@ -268,6 +268,17 @@
- BL_COHERENT_RAM_BASE, \
MT_DEVICE | MT_RW | MT_SECURE)
#endif
#if USE_ROMLIB
#define ARM_MAP_ROMLIB_CODE MAP_REGION_FLAT( \
ROMLIB_RO_BASE, \
ROMLIB_RO_LIMIT - ROMLIB_RO_BASE,\
MT_CODE | MT_SECURE)
#define ARM_MAP_ROMLIB_DATA MAP_REGION_FLAT( \
ROMLIB_RW_BASE, \
ROMLIB_RW_END - ROMLIB_RW_BASE,\
MT_MEMORY | MT_RW | MT_SECURE)
#endif
/*
* The max number of regions like RO(code), coherent and data required by
@ -346,14 +357,23 @@
******************************************************************************/
#define BL1_RO_BASE PLAT_ARM_TRUSTED_ROM_BASE
#define BL1_RO_LIMIT (PLAT_ARM_TRUSTED_ROM_BASE \
+ PLAT_ARM_TRUSTED_ROM_SIZE)
+ (PLAT_ARM_TRUSTED_ROM_SIZE - \
PLAT_ARM_MAX_ROMLIB_RO_SIZE))
/*
* Put BL1 RW at the top of the Trusted SRAM.
*/
#define BL1_RW_BASE (ARM_BL_RAM_BASE + \
ARM_BL_RAM_SIZE - \
PLAT_ARM_MAX_BL1_RW_SIZE)
#define BL1_RW_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
(PLAT_ARM_MAX_BL1_RW_SIZE +\
PLAT_ARM_MAX_ROMLIB_RW_SIZE))
#define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \
(ARM_BL_RAM_SIZE - PLAT_ARM_MAX_ROMLIB_RW_SIZE))
#define ROMLIB_RO_BASE BL1_RO_LIMIT
#define ROMLIB_RO_LIMIT (PLAT_ARM_TRUSTED_ROM_BASE + PLAT_ARM_TRUSTED_ROM_SIZE)
#define ROMLIB_RW_BASE (BL1_RW_BASE + PLAT_ARM_MAX_BL1_RW_SIZE)
#define ROMLIB_RW_END (ROMLIB_RW_BASE + PLAT_ARM_MAX_ROMLIB_RW_SIZE)
/*******************************************************************************
* BL2 specific defines.

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@ -72,6 +72,8 @@ typedef struct arm_tzc_regions_info {
void arm_setup_page_tables(const mmap_region_t bl_regions[],
const mmap_region_t plat_regions[]);
void arm_setup_romlib(void);
#if defined(IMAGE_BL31) || (defined(AARCH32) && defined(IMAGE_BL32))
/*
* Use this macro to instantiate lock before it is used in below

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@ -67,6 +67,8 @@
* in debug mode. We can test TBB on Juno bypassing the ROM and using 128 KB of
* flash
*/
#define PLAT_ARM_MAX_ROMLIB_RO_SIZE 0
#if TRUSTED_BOARD_BOOT
#define PLAT_ARM_TRUSTED_ROM_SIZE 0x00020000
#else
@ -122,6 +124,15 @@
# define PLAT_ARM_MAX_BL1_RW_SIZE 0x6000
#endif
/*
* PLAT_ARM_MAX_ROMLIB_RW_SIZE is define to use a full page
*/
#if USE_ROMLIB
#define PLAT_ARM_MAX_ROMLIB_RW_SIZE 0x1000
#else
#define PLAT_ARM_MAX_ROMLIB_RW_SIZE 0
#endif
/*
* PLAT_ARM_MAX_BL2_SIZE is calculated using the current BL2 debug size plus a
* little space for growth.

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@ -117,6 +117,10 @@ void arm_bl1_plat_arch_setup(void)
const mmap_region_t bl_regions[] = {
MAP_BL1_TOTAL,
MAP_BL1_RO,
#if USE_ROMLIB
ARM_MAP_ROMLIB_CODE,
ARM_MAP_ROMLIB_DATA,
#endif
{0}
};
@ -126,6 +130,8 @@ void arm_bl1_plat_arch_setup(void)
#else
enable_mmu_el3(0);
#endif /* AARCH32 */
arm_setup_romlib();
}
void bl1_plat_arch_setup(void)

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@ -246,6 +246,10 @@ void arm_bl2_plat_arch_setup(void)
const mmap_region_t bl_regions[] = {
MAP_BL2_TOTAL,
ARM_MAP_BL_RO,
#if USE_ROMLIB
ARM_MAP_ROMLIB_CODE,
ARM_MAP_ROMLIB_DATA,
#endif
{0}
};
@ -256,6 +260,8 @@ void arm_bl2_plat_arch_setup(void)
#else
enable_mmu_el1(0);
#endif
arm_setup_romlib();
}
void bl2_plat_arch_setup(void)

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@ -73,6 +73,10 @@ void arm_bl2u_plat_arch_setup(void)
const mmap_region_t bl_regions[] = {
MAP_BL2U_TOTAL,
ARM_MAP_BL_RO,
#if USE_ROMLIB
ARM_MAP_ROMLIB_CODE,
ARM_MAP_ROMLIB_DATA,
#endif
{0}
};
@ -83,6 +87,7 @@ void arm_bl2u_plat_arch_setup(void)
#else
enable_mmu_el1(0);
#endif
arm_setup_romlib();
}
void bl2u_plat_arch_setup(void)

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@ -285,9 +285,18 @@ void bl31_plat_runtime_setup(void)
void arm_bl31_plat_arch_setup(void)
{
#define ARM_MAP_BL_ROMLIB MAP_REGION_FLAT( \
BL31_BASE, \
BL31_END - BL31_BASE, \
MT_MEMORY | MT_RW | MT_SECURE)
const mmap_region_t bl_regions[] = {
MAP_BL31_TOTAL,
ARM_MAP_BL_RO,
#if USE_ROMLIB
ARM_MAP_ROMLIB_CODE,
ARM_MAP_ROMLIB_DATA,
#endif
#if USE_COHERENT_MEM
ARM_MAP_BL_COHERENT_RAM,
#endif
@ -297,6 +306,8 @@ void arm_bl31_plat_arch_setup(void)
arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
enable_mmu_el3(0);
arm_setup_romlib();
}
void bl31_plat_arch_setup(void)

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@ -10,8 +10,9 @@
#include <debug.h>
#include <mmio.h>
#include <plat_arm.h>
#include <platform_def.h>
#include <platform.h>
#include <platform_def.h>
#include <romlib.h>
#include <secure_partition.h>
/* Weak definitions may be overridden in specific ARM standard platform */
@ -24,6 +25,15 @@
#pragma weak plat_get_syscnt_freq2
#endif
void arm_setup_romlib(void)
{
#if USE_ROMLIB
if (!rom_lib_init(ROMLIB_VERSION))
panic();
#endif
}
/*
* Set up the page tables for the generic and platform-specific memory regions.
* The size of the Trusted SRAM seen by the BL image must be specified as well