From 204aa03da7d8a34d5e06fba3ccc9e565ed01d305 Mon Sep 17 00:00:00 2001 From: Sandrine Bailleux Date: Mon, 28 Oct 2013 15:14:00 +0000 Subject: [PATCH] fvp: Remove unnecessary initializers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Global and static variables are expected to be initialised to zero by default. This is specified by the C99 standard. This patch removes some unnecessary initialisations of such variables. It fixes a compilation warning at the same time: plat/fvp/bl31_plat_setup.c:82:3: warning: missing braces around initializer [-Wmissing-braces] section("tzfw_coherent_mem"))) = {0}; ^ plat/fvp/bl31_plat_setup.c:82:3: warning: (near initialization for ‘ns_entry_info[0]’) [-Wmissing-braces] Note that GCC should not have emitted this warning message in the first place. The C Standard permits braces to be elided around subaggregate initializers. See this GCC bug report: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53119 Change-Id: I13cb0c344feb9803bca8819f976377741fa6bc35 --- docs/change-log.md | 2 ++ plat/fvp/bl1_plat_setup.c | 2 +- plat/fvp/bl2_plat_setup.c | 4 ++-- plat/fvp/bl31_plat_setup.c | 4 ++-- 4 files changed, 7 insertions(+), 5 deletions(-) diff --git a/docs/change-log.md b/docs/change-log.md index 71e6db1cb..1f2d12c4b 100644 --- a/docs/change-log.md +++ b/docs/change-log.md @@ -15,6 +15,8 @@ Detailed changes since last release * The supplied FDTs expose the Interrupt Translation Service (ITS) available in GICv3. +* Fixed various GCC compiler warnings. + ARM Trusted Firmware - version 0.2 ================================== diff --git a/plat/fvp/bl1_plat_setup.c b/plat/fvp/bl1_plat_setup.c index 7fa3f7686..434dfb793 100644 --- a/plat/fvp/bl1_plat_setup.c +++ b/plat/fvp/bl1_plat_setup.c @@ -83,7 +83,7 @@ extern unsigned long __FIRMWARE_RAM_COHERENT_SIZE__; /* Data structure which holds the extents of the trusted SRAM for BL1*/ -static meminfo bl1_tzram_layout = {0}; +static meminfo bl1_tzram_layout; meminfo bl1_get_sec_mem_layout(void) { diff --git a/plat/fvp/bl2_plat_setup.c b/plat/fvp/bl2_plat_setup.c index 4bb10157c..9cd123a4c 100644 --- a/plat/fvp/bl2_plat_setup.c +++ b/plat/fvp/bl2_plat_setup.c @@ -60,10 +60,10 @@ extern unsigned char **bl2_el_change_mem_ptr; /* Data structure which holds the extents of the trusted SRAM for BL2 */ static meminfo bl2_tzram_layout __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE), - section("tzfw_coherent_mem"))) = {0}; + section("tzfw_coherent_mem"))); /* Data structure which holds the extents of the non-trusted DRAM for BL2*/ -static meminfo dram_layout = {0}; +static meminfo dram_layout; meminfo bl2_get_sec_mem_layout(void) { diff --git a/plat/fvp/bl31_plat_setup.c b/plat/fvp/bl31_plat_setup.c index 7aa1182dd..0dd5c69f6 100644 --- a/plat/fvp/bl31_plat_setup.c +++ b/plat/fvp/bl31_plat_setup.c @@ -68,12 +68,12 @@ extern unsigned long __BL31_RW_BASE__; ******************************************************************************/ el_change_info ns_entry_info[PLATFORM_CORE_COUNT] __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE), - section("tzfw_coherent_mem"))) = {0}; + section("tzfw_coherent_mem"))); /* Data structure which holds the extents of the trusted SRAM for BL31 */ static meminfo bl31_tzram_layout __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE), - section("tzfw_coherent_mem"))) = {0}; + section("tzfw_coherent_mem"))); meminfo bl31_get_sec_mem_layout(void) {