Merge "plat: imx8m: Add caam module init on imx8m" into integration
This commit is contained in:
Sandrine Bailleux
TrustedFirmware Code Review
commit
21bde92ff6
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@ -0,0 +1,40 @@
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/*
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* Copyright (c) 2019, NXP. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <lib/mmio.h>
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#include <imx8m_caam.h>
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void imx8m_caam_init(void)
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{
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uint32_t sm_cmd;
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/* Dealloc part 0 and 2 with current DID */
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sm_cmd = (0 << SMC_PART_SHIFT | SMC_CMD_DEALLOC_PART);
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mmio_write_32(SM_CMD, sm_cmd);
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sm_cmd = (2 << SMC_PART_SHIFT | SMC_CMD_DEALLOC_PART);
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mmio_write_32(SM_CMD, sm_cmd);
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/* config CAAM JRaMID set MID to Cortex A */
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mmio_write_32(CAAM_JR0MID, CAAM_NS_MID);
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mmio_write_32(CAAM_JR1MID, CAAM_NS_MID);
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mmio_write_32(CAAM_JR2MID, CAAM_NS_MID);
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/* Alloc partition 0 writing SMPO and SMAGs */
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mmio_write_32(SM_P0_PERM, 0xff);
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mmio_write_32(SM_P0_SMAG2, 0xffffffff);
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mmio_write_32(SM_P0_SMAG1, 0xffffffff);
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/* Allocate page 0 and 1 to partition 0 with DID set */
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sm_cmd = (0 << SMC_PAGE_SHIFT | 0 << SMC_PART_SHIFT |
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SMC_CMD_ALLOC_PAGE);
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mmio_write_32(SM_CMD, sm_cmd);
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sm_cmd = (1 << SMC_PAGE_SHIFT | 0 << SMC_PART_SHIFT |
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SMC_CMD_ALLOC_PAGE);
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mmio_write_32(SM_CMD, sm_cmd);
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}
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@ -24,6 +24,7 @@
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#include <gpc.h>
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#include <imx_aipstz.h>
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#include <imx_uart.h>
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#include <imx8m_caam.h>
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#include <plat_imx8.h>
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static const mmap_region_t imx_mmap[] = {
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@ -93,6 +94,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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imx_aipstz_init(aipstz);
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imx8m_caam_init();
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console_imx_uart_register(IMX_BOOT_UART_BASE, IMX_BOOT_UART_CLK_IN_HZ,
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IMX_CONSOLE_BAUDRATE, &console);
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/* This console is only used for boot stage */
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@ -77,6 +77,7 @@
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#define IMX_NOC_BASE U(0x32700000)
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#define IMX_TZASC_BASE U(0x32F80000)
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#define IMX_IOMUX_GPR_BASE U(0x30340000)
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#define IMX_CAAM_BASE U(0x30900000)
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#define IMX_DDRC_BASE U(0x3d400000)
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#define IMX_DDRPHY_BASE U(0x3c000000)
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#define IMX_DDR_IPS_BASE U(0x3d000000)
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@ -20,6 +20,7 @@ IMX_GIC_SOURCES := drivers/arm/gic/v3/gicv3_helpers.c \
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BL31_SOURCES += plat/imx/common/imx8_helpers.S \
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plat/imx/imx8m/gpc_common.c \
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plat/imx/imx8m/imx_aipstz.c \
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plat/imx/imx8m/imx8m_caam.c \
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plat/imx/imx8m/imx8m_psci_common.c \
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plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c \
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plat/imx/imx8m/imx8mm/imx8mm_psci.c \
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@ -24,6 +24,7 @@
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#include <gpc.h>
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#include <imx_aipstz.h>
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#include <imx_uart.h>
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#include <imx8m_caam.h>
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#include <plat_imx8.h>
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static const mmap_region_t imx_mmap[] = {
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@ -129,10 +130,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
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imx_aipstz_init(aipstz);
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/* config CAAM JRaMID set MID to Cortex A */
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mmio_write_32(CAAM_JR0MID, CAAM_NS_MID);
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mmio_write_32(CAAM_JR1MID, CAAM_NS_MID);
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mmio_write_32(CAAM_JR2MID, CAAM_NS_MID);
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imx8m_caam_init();
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#if DEBUG_CONSOLE
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static console_uart_t console;
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -70,6 +70,7 @@
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#define IMX_SNVS_BASE U(0x30370000)
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#define IMX_NOC_BASE U(0x32700000)
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#define IMX_TZASC_BASE U(0x32F80000)
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#define IMX_CAAM_BASE U(0x30900000)
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#define IMX_IOMUX_GPR_BASE U(0x30340000)
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#define IMX_DDRC_BASE U(0x3d400000)
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#define IMX_DDRPHY_BASE U(0x3c000000)
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@ -122,8 +123,3 @@
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#define DEBUG_CONSOLE 0
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#define IMX_WDOG_B_RESET
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#define CAAM_JR0MID U(0x30900010)
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#define CAAM_JR1MID U(0x30900018)
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#define CAAM_JR2MID U(0x30900020)
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#define CAAM_NS_MID U(0x1)
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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@ -22,6 +22,7 @@ BL31_SOURCES += plat/imx/common/imx8_helpers.S \
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plat/imx/imx8m/imx8mq/imx8mq_psci.c \
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plat/imx/imx8m/gpc_common.c \
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plat/imx/imx8m/imx_aipstz.c \
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plat/imx/imx8m/imx8m_caam.c \
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plat/imx/imx8m/imx8m_psci_common.c \
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plat/imx/imx8m/imx8mq/gpc.c \
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plat/imx/common/imx8_topology.c \
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@ -0,0 +1,35 @@
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/*
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* Copyright (c) 2019, NXP. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef IMX8M_CAAM_H
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#define IMX8M_CAAM_H
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#include <lib/utils_def.h>
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#include <platform_def.h>
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#define CAAM_JR0MID (IMX_CAAM_BASE + 0x10)
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#define CAAM_JR1MID (IMX_CAAM_BASE + 0x18)
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#define CAAM_JR2MID (IMX_CAAM_BASE + 0x20)
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#define CAAM_NS_MID (0x1)
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#define JR0_BASE (IMX_CAAM_BASE + 0x1000)
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#define SM_P0_PERM (JR0_BASE + 0xa04)
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#define SM_P0_SMAG2 (JR0_BASE + 0xa08)
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#define SM_P0_SMAG1 (JR0_BASE + 0xa0c)
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#define SM_CMD (JR0_BASE + 0xbe4)
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/* secure memory command */
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#define SMC_PAGE_SHIFT 16
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#define SMC_PART_SHIFT 8
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#define SMC_CMD_ALLOC_PAGE 0x01 /* allocate page to this partition */
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#define SMC_CMD_DEALLOC_PART 0x03 /* deallocate partition */
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void imx8m_caam_init(void);
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#endif /* IMX8M_CAAM_H */
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