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Tegra194: memctrl: force viw and vifalr/w transactions as non-coherent 

Force memory transactions from viw and viflar/w as non-coherent from
no-override. This is necessary as iso clients shouldn't use coherent
path and stage-2 smmu mappings won't mark transactions as non-coherent.
For native case, no-override works. But, not for virtualization case.

Change-Id: I1a8fc17787c8d0f8579bdaeeb719084993e27276
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
This commit is contained in:
Krishna Reddy 2017-12-22 20:17:09 -08:00 committed by Manish Pandey
parent 95f68bc498
commit 221b8e5781
2 changed files with 13 additions and 16 deletions
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4
plat/nvidia/tegra/include/t194/tegra_mc_def.h
View File

@ -53,8 +53,8 @@
#define MC_HUB_PC_VC_ID_4_NIC_VC_ID_MASK (0x3U << 28)
#define MC_HUB_PC_VC_ID_4_NIC_VC_ID (VC_NISO << 28)
#define mc_hub_vc_id(id, client) \
(~MC_HUB_PC_VC_ID_##id##_##client##_VC_ID_MASK | \
#define mc_hub_vc_id(val, id, client) \
((val & ~MC_HUB_PC_VC_ID_##id##_##client##_VC_ID_MASK) | \
MC_HUB_PC_VC_ID_##id##_##client##_VC_ID)
/*******************************************************************************

25
plat/nvidia/tegra/soc/t194/plat_memctrl.c
View File

@ -478,8 +478,9 @@ static void tegra194_memctrl_reconfig_mss_clients(void)
mc_set_txn_override(VICSRD, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE);
mc_set_txn_override(VICSRD1, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE);
mc_set_txn_override(VICSWR, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE);
mc_set_txn_override(VIFALR, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE);
mc_set_txn_override(VIFALW, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE);
mc_set_txn_override(VIW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
mc_set_txn_override(VIFALR, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
mc_set_txn_override(VIFALW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT, FORCE_NON_COHERENT);
mc_set_txn_override(XUSB_DEVR, CGID_TAG_DEFAULT, SO_DEV_ZERO, NO_OVERRIDE, NO_OVERRIDE);
mc_set_txn_override(XUSB_DEVW, CGID_TAG_DEFAULT, SO_DEV_ZERO, FORCE_NON_COHERENT,
FORCE_COHERENT_SNOOP);
@ -587,23 +588,19 @@ static void tegra194_memctrl_reconfig_mss_clients(void)
reg_val = mc_client_order_id(reg_val, 28, PCIE5W);
tegra_mc_write_32(MC_CLIENT_ORDER_ID_28, reg_val);
/* Set VC Id only for the clients having different reset values */
reg_val = MC_HUB_PC_VC_ID_0_RESET_VAL &
/*
* SDMMCRAB, SDMMCWAB, SESRD, SESWR, TSECSRD,TSECSRDB,
* TSECSWR and TSECSWRB clients
*/
mc_hub_vc_id(0, APB);
/*
* Set VC Id only for the clients having different reset values like
* SDMMCRAB, SDMMCWAB, SESRD, SESWR, TSECSRD,TSECSRDB, TSECSWR and
* TSECSWRB clients
*/
reg_val = mc_hub_vc_id(MC_HUB_PC_VC_ID_0_RESET_VAL, 0, APB);
tegra_mc_write_32(MC_HUB_PC_VC_ID_0, reg_val);
reg_val = MC_HUB_PC_VC_ID_2_RESET_VAL &
/* SDMMCRAB and SDMMCWAB clients */
mc_hub_vc_id(2, SD);
reg_val = mc_hub_vc_id(MC_HUB_PC_VC_ID_2_RESET_VAL, 2, SD);
tegra_mc_write_32(MC_HUB_PC_VC_ID_2, reg_val);
reg_val = MC_HUB_PC_VC_ID_4_RESET_VAL &
/* AXIR and AXIW clients */
mc_hub_vc_id(4, NIC);
reg_val = mc_hub_vc_id(MC_HUB_PC_VC_ID_4_RESET_VAL, 4, NIC);
tegra_mc_write_32(MC_HUB_PC_VC_ID_4, reg_val);
wdata_0 = MC_CLIENT_HOTRESET_CTRL0_RESET_VAL;