From 7a57188b9498aedb597349fb806f87911b2bfb50 Mon Sep 17 00:00:00 2001 From: Deepika Bhavnani Date: Fri, 13 Dec 2019 10:47:06 -0600 Subject: [PATCH] imx: Unify Platform specific defines for PSCI module PLATFORM_CORE_COUNT - Unsigned int PLATFORM_CLUSTER_COUNT - Unsigned int PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int Signed-off-by: Deepika Bhavnani Change-Id: I8b19e833a4e1067e1cfcc9bfaede7854e0e63004 --- plat/imx/imx7/picopi/include/platform_def.h | 8 ++++---- plat/imx/imx7/warp7/include/platform_def.h | 8 ++++---- plat/imx/imx8m/imx8mm/include/platform_def.h | 10 +++++----- plat/imx/imx8m/imx8mq/include/platform_def.h | 10 +++++----- plat/imx/imx8qm/include/platform_def.h | 12 ++++++------ plat/imx/imx8qx/include/platform_def.h | 14 +++++++------- 6 files changed, 31 insertions(+), 31 deletions(-) diff --git a/plat/imx/imx7/picopi/include/platform_def.h b/plat/imx/imx7/picopi/include/platform_def.h index 1af1d0cfc..141571c67 100644 --- a/plat/imx/imx7/picopi/include/platform_def.h +++ b/plat/imx/imx7/picopi/include/platform_def.h @@ -13,15 +13,15 @@ #define PLATFORM_STACK_SIZE 0x1000 -#define PLATFORM_MAX_CPUS_PER_CLUSTER 2 -#define PLATFORM_CLUSTER_COUNT 1 +#define PLATFORM_MAX_CPUS_PER_CLUSTER U(2) +#define PLATFORM_CLUSTER_COUNT U(1) #define PLATFORM_CLUSTER0_CORE_COUNT PLATFORM_MAX_CPUS_PER_CLUSTER #define PLATFORM_CORE_COUNT PLATFORM_CLUSTER0_CORE_COUNT -#define PICOPI_PRIMARY_CPU 0 +#define PICOPI_PRIMARY_CPU U(0) -#define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \ +#define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \ PLATFORM_CORE_COUNT) #define PLAT_MAX_PWR_LVL MPIDR_AFFLVL1 diff --git a/plat/imx/imx7/warp7/include/platform_def.h b/plat/imx/imx7/warp7/include/platform_def.h index 4f719083e..4afcb5497 100644 --- a/plat/imx/imx7/warp7/include/platform_def.h +++ b/plat/imx/imx7/warp7/include/platform_def.h @@ -13,15 +13,15 @@ #define PLATFORM_STACK_SIZE 0x1000 -#define PLATFORM_MAX_CPUS_PER_CLUSTER 2 -#define PLATFORM_CLUSTER_COUNT 1 +#define PLATFORM_MAX_CPUS_PER_CLUSTER U(2) +#define PLATFORM_CLUSTER_COUNT U(1) #define PLATFORM_CLUSTER0_CORE_COUNT PLATFORM_MAX_CPUS_PER_CLUSTER -#define PLATFORM_CLUSTER1_CORE_COUNT 0 +#define PLATFORM_CLUSTER1_CORE_COUNT U(0) #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT + \ PLATFORM_CLUSTER1_CORE_COUNT) -#define WARP7_PRIMARY_CPU 0 +#define WARP7_PRIMARY_CPU U(0) #define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \ PLATFORM_CORE_COUNT) diff --git a/plat/imx/imx8m/imx8mm/include/platform_def.h b/plat/imx/imx8m/imx8mm/include/platform_def.h index fc35dac14..56caab7ce 100644 --- a/plat/imx/imx8m/imx8mm/include/platform_def.h +++ b/plat/imx/imx8m/imx8mm/include/platform_def.h @@ -10,11 +10,11 @@ #define PLATFORM_STACK_SIZE 0xB00 #define CACHE_WRITEBACK_GRANULE 64 -#define PLAT_PRIMARY_CPU 0x0 -#define PLATFORM_MAX_CPU_PER_CLUSTER 4 -#define PLATFORM_CLUSTER_COUNT 1 -#define PLATFORM_CLUSTER0_CORE_COUNT 4 -#define PLATFORM_CLUSTER1_CORE_COUNT 0 +#define PLAT_PRIMARY_CPU U(0x0) +#define PLATFORM_MAX_CPU_PER_CLUSTER U(4) +#define PLATFORM_CLUSTER_COUNT U(1) +#define PLATFORM_CLUSTER0_CORE_COUNT U(4) +#define PLATFORM_CLUSTER1_CORE_COUNT U(0) #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT) #define IMX_PWR_LVL0 MPIDR_AFFLVL0 diff --git a/plat/imx/imx8m/imx8mq/include/platform_def.h b/plat/imx/imx8m/imx8mq/include/platform_def.h index 9aa759fd3..9db3a137a 100644 --- a/plat/imx/imx8m/imx8mq/include/platform_def.h +++ b/plat/imx/imx8m/imx8mq/include/platform_def.h @@ -10,11 +10,11 @@ #define PLATFORM_STACK_SIZE 0x800 #define CACHE_WRITEBACK_GRANULE 64 -#define PLAT_PRIMARY_CPU 0x0 -#define PLATFORM_MAX_CPU_PER_CLUSTER 4 -#define PLATFORM_CLUSTER_COUNT 1 -#define PLATFORM_CLUSTER0_CORE_COUNT 4 -#define PLATFORM_CLUSTER1_CORE_COUNT 0 +#define PLAT_PRIMARY_CPU U(0x0) +#define PLATFORM_MAX_CPU_PER_CLUSTER U(4) +#define PLATFORM_CLUSTER_COUNT U(1) +#define PLATFORM_CLUSTER0_CORE_COUNT U(4) +#define PLATFORM_CLUSTER1_CORE_COUNT U(0) #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT) #define IMX_PWR_LVL0 MPIDR_AFFLVL0 diff --git a/plat/imx/imx8qm/include/platform_def.h b/plat/imx/imx8qm/include/platform_def.h index 138a4e1d3..b54943da0 100644 --- a/plat/imx/imx8qm/include/platform_def.h +++ b/plat/imx/imx8qm/include/platform_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -15,11 +15,11 @@ #define PLATFORM_STACK_SIZE 0X400 #define CACHE_WRITEBACK_GRANULE 64 -#define PLAT_PRIMARY_CPU 0x0 -#define PLATFORM_MAX_CPU_PER_CLUSTER 4 -#define PLATFORM_CLUSTER_COUNT 2 -#define PLATFORM_CLUSTER0_CORE_COUNT 4 -#define PLATFORM_CLUSTER1_CORE_COUNT 2 +#define PLAT_PRIMARY_CPU U(0x0) +#define PLATFORM_MAX_CPU_PER_CLUSTER U(4) +#define PLATFORM_CLUSTER_COUNT U(2) +#define PLATFORM_CLUSTER0_CORE_COUNT U(4) +#define PLATFORM_CLUSTER1_CORE_COUNT U(2) #define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT + \ PLATFORM_CLUSTER1_CORE_COUNT) diff --git a/plat/imx/imx8qx/include/platform_def.h b/plat/imx/imx8qx/include/platform_def.h index 108627f66..41475ffeb 100644 --- a/plat/imx/imx8qx/include/platform_def.h +++ b/plat/imx/imx8qx/include/platform_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -15,12 +15,12 @@ #define PLATFORM_STACK_SIZE 0x400 #define CACHE_WRITEBACK_GRANULE 64 -#define PLAT_PRIMARY_CPU 0x0 -#define PLATFORM_MAX_CPU_PER_CLUSTER 4 -#define PLATFORM_CLUSTER_COUNT 1 -#define PLATFORM_CORE_COUNT 4 -#define PLATFORM_CLUSTER0_CORE_COUNT 4 -#define PLATFORM_CLUSTER1_CORE_COUNT 0 +#define PLAT_PRIMARY_CPU U(0x0) +#define PLATFORM_MAX_CPU_PER_CLUSTER U(4) +#define PLATFORM_CLUSTER_COUNT U(1) +#define PLATFORM_CORE_COUNT U(4) +#define PLATFORM_CLUSTER0_CORE_COUNT U(4) +#define PLATFORM_CLUSTER1_CORE_COUNT U(0) #define PWR_DOMAIN_AT_MAX_LVL U(1) #define PLAT_MAX_PWR_LVL U(2)