stm32mp1: rename stpmu1 to stpmic1
This is the correct name of the IP. Rename stm32mp1_pmic files to stm32mp_pmic. Change-Id: I238a7d1f9a1d099daf7788dc9ebbd3146ba2f15f Signed-off-by: Yann Gautier <yann.gautier@st.com>
This commit is contained in:
Yann Gautier
parent
435832abfd
commit
23684d0e81
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
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* Copyright (C) 2018-2019, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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*/
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@ -12,10 +12,10 @@
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <drivers/delay_timer.h>
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#include <drivers/st/stm32mp_pmic.h>
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#include <drivers/st/stm32mp1_clk.h>
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#include <drivers/st/stm32mp1_ddr.h>
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#include <drivers/st/stm32mp1_ddr_regs.h>
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#include <drivers/st/stm32mp1_pmic.h>
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#include <drivers/st/stm32mp1_pwr.h>
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#include <drivers/st/stm32mp1_ram.h>
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#include <drivers/st/stm32mp1_rcc.h>
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2018, STMicroelectronics - All Rights Reserved
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* Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -13,10 +13,10 @@
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#include <common/debug.h>
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#include <drivers/delay_timer.h>
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#include <drivers/st/stm32mp_pmic.h>
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#include <drivers/st/stm32_gpio.h>
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#include <drivers/st/stm32mp1_clk.h>
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#include <drivers/st/stm32mp1_pmic.h>
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#include <drivers/st/stpmu1.h>
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#include <drivers/st/stpmic1.h>
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#include <lib/mmio.h>
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#include <lib/utils_def.h>
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@ -27,23 +27,23 @@
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#define MASK_RESET_BUCK3 BIT(2)
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#define STPMU1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2))
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#define STPMU1_LDO12356_OUTPUT_SHIFT 2
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#define STPMU1_LDO3_MODE (uint8_t)(BIT(7))
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#define STPMU1_LDO3_DDR_SEL 31U
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#define STPMU1_LDO3_1800000 (9U << STPMU1_LDO12356_OUTPUT_SHIFT)
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#define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2))
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#define STPMIC1_LDO12356_OUTPUT_SHIFT 2
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#define STPMIC1_LDO3_MODE (uint8_t)(BIT(7))
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#define STPMIC1_LDO3_DDR_SEL 31U
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#define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT)
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#define STPMU1_BUCK_OUTPUT_SHIFT 2
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#define STPMU1_BUCK3_1V8 (39U << STPMU1_BUCK_OUTPUT_SHIFT)
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#define STPMIC1_BUCK_OUTPUT_SHIFT 2
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#define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT)
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#define STPMU1_DEFAULT_START_UP_DELAY_MS 1
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#define STPMIC1_DEFAULT_START_UP_DELAY_MS 1
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static struct i2c_handle_s i2c_handle;
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static uint32_t pmic_i2c_addr;
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static int dt_get_pmic_node(void *fdt)
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{
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return fdt_node_offset_by_compatible(fdt, -1, "st,stpmu1");
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return fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1");
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}
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bool dt_check_pmic(void)
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@ -138,16 +138,16 @@ int dt_pmic_enable_boot_on_regulators(void)
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voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U);
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node_name = fdt_get_name(fdt, regulator_node, NULL);
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if (stpmu1_is_regulator_enabled(node_name) == 0U) {
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if (stpmic1_is_regulator_enabled(node_name) == 0U) {
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int status;
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status = stpmu1_regulator_voltage_set(node_name,
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voltage);
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status = stpmic1_regulator_voltage_set(node_name,
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voltage);
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if (status != 0) {
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return status;
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}
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status = stpmu1_regulator_enable(node_name);
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status = stpmic1_regulator_enable(node_name);
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if (status != 0) {
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return status;
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}
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@ -204,7 +204,7 @@ void initialize_pmic_i2c(void)
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panic();
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}
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stpmu1_bind_i2c(&i2c_handle, (uint16_t)pmic_i2c_addr);
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stpmic1_bind_i2c(&i2c_handle, (uint16_t)pmic_i2c_addr);
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}
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void initialize_pmic(void)
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@ -214,7 +214,7 @@ void initialize_pmic(void)
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initialize_pmic_i2c();
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status = stpmu1_register_read(VERSION_STATUS_REG, &read_val);
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status = stpmic1_register_read(VERSION_STATUS_REG, &read_val);
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if (status != 0) {
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panic();
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}
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@ -222,7 +222,7 @@ void initialize_pmic(void)
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INFO("PMIC version = 0x%x\n", read_val);
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/* Keep VDD on during the reset cycle */
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status = stpmu1_register_update(MASK_RESET_BUCK_REG,
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status = stpmic1_register_update(MASK_RESET_BUCK_REG,
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MASK_RESET_BUCK3,
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MASK_RESET_BUCK3);
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if (status != 0) {
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@ -239,45 +239,46 @@ int pmic_ddr_power_init(enum ddr_type ddr_type)
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switch (ddr_type) {
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case STM32MP_DDR3:
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/* Set LDO3 to sync mode */
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status = stpmu1_register_read(LDO3_CONTROL_REG, &read_val);
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status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val);
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if (status != 0) {
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return status;
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}
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read_val &= ~STPMU1_LDO3_MODE;
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read_val &= ~STPMU1_LDO12356_OUTPUT_MASK;
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read_val |= STPMU1_LDO3_DDR_SEL << STPMU1_LDO12356_OUTPUT_SHIFT;
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read_val &= ~STPMIC1_LDO3_MODE;
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read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK;
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read_val |= STPMIC1_LDO3_DDR_SEL <<
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STPMIC1_LDO12356_OUTPUT_SHIFT;
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status = stpmu1_register_write(LDO3_CONTROL_REG, read_val);
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status = stpmic1_register_write(LDO3_CONTROL_REG, read_val);
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if (status != 0) {
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return status;
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}
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status = stpmu1_regulator_voltage_set("buck2", 1350);
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status = stpmic1_regulator_voltage_set("buck2", 1350);
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if (status != 0) {
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return status;
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}
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status = stpmu1_regulator_enable("buck2");
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status = stpmic1_regulator_enable("buck2");
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if (status != 0) {
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return status;
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}
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mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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status = stpmu1_regulator_enable("vref_ddr");
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status = stpmic1_regulator_enable("vref_ddr");
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if (status != 0) {
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return status;
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}
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mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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status = stpmu1_regulator_enable("ldo3");
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status = stpmic1_regulator_enable("ldo3");
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if (status != 0) {
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return status;
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}
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mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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break;
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case STM32MP_LPDDR2:
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@ -286,57 +287,57 @@ int pmic_ddr_power_init(enum ddr_type ddr_type)
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* Set LDO3 to bypass mode if BUCK3 = 1.8V
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* Set LDO3 to normal mode if BUCK3 != 1.8V
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*/
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status = stpmu1_register_read(BUCK3_CONTROL_REG, &read_val);
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status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val);
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if (status != 0) {
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return status;
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}
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if ((read_val & STPMU1_BUCK3_1V8) == STPMU1_BUCK3_1V8) {
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if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) {
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buck3_at_1v8 = true;
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}
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status = stpmu1_register_read(LDO3_CONTROL_REG, &read_val);
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status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val);
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if (status != 0) {
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return status;
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}
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read_val &= ~STPMU1_LDO3_MODE;
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read_val &= ~STPMU1_LDO12356_OUTPUT_MASK;
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read_val |= STPMU1_LDO3_1800000;
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read_val &= ~STPMIC1_LDO3_MODE;
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read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK;
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read_val |= STPMIC1_LDO3_1800000;
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if (buck3_at_1v8) {
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read_val |= STPMU1_LDO3_MODE;
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read_val |= STPMIC1_LDO3_MODE;
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}
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status = stpmu1_register_write(LDO3_CONTROL_REG, read_val);
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status = stpmic1_register_write(LDO3_CONTROL_REG, read_val);
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if (status != 0) {
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return status;
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}
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status = stpmu1_regulator_voltage_set("buck2", 1200);
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status = stpmic1_regulator_voltage_set("buck2", 1200);
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if (status != 0) {
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return status;
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}
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status = stpmu1_regulator_enable("ldo3");
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status = stpmic1_regulator_enable("ldo3");
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if (status != 0) {
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return status;
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}
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mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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status = stpmu1_regulator_enable("buck2");
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status = stpmic1_regulator_enable("buck2");
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if (status != 0) {
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return status;
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}
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mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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status = stpmu1_regulator_enable("vref_ddr");
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status = stpmic1_regulator_enable("vref_ddr");
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if (status != 0) {
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return status;
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}
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mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
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mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
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break;
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default:
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2018, STMicroelectronics - All Rights Reserved
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* Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -7,7 +7,7 @@
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#include <string.h>
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#include <common/debug.h>
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#include <drivers/st/stpmu1.h>
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#include <drivers/st/stpmic1.h>
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#include <plat/common/platform.h>
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struct regul_struct {
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@ -18,8 +18,8 @@ struct regul_struct {
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uint8_t low_power_reg;
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};
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static struct i2c_handle_s *stpmu_i2c_handle;
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static uint16_t stpmu_i2c_addr;
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static struct i2c_handle_s *pmic_i2c_handle;
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static uint16_t pmic_i2c_addr;
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/* Voltage tables in mV */
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static const uint16_t buck1_voltage_table[] = {
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@ -462,9 +462,9 @@ static const struct regul_struct regulators_table[] = {
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},
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};
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#define MAX_REGUL ARRAY_SIZE(regulators_table)
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#define MAX_REGUL ARRAY_SIZE(regulators_table)
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static const struct regul_struct *stpmu1_get_regulator_data(const char *name)
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static const struct regul_struct *get_regulator_data(const char *name)
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{
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uint8_t i;
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@ -480,10 +480,9 @@ static const struct regul_struct *stpmu1_get_regulator_data(const char *name)
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return NULL;
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}
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static uint8_t stpmu1_voltage_find_index(const char *name,
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uint16_t millivolts)
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static uint8_t voltage_to_index(const char *name, uint16_t millivolts)
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{
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const struct regul_struct *regul = stpmu1_get_regulator_data(name);
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const struct regul_struct *regul = get_regulator_data(name);
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uint8_t i;
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for (i = 0 ; i < regul->voltage_table_size ; i++) {
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@ -498,59 +497,59 @@ static uint8_t stpmu1_voltage_find_index(const char *name,
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return 0;
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}
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int stpmu1_switch_off(void)
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int stpmic1_switch_off(void)
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{
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return stpmu1_register_update(MAIN_CONTROL_REG, 1,
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SOFTWARE_SWITCH_OFF_ENABLED);
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return stpmic1_register_update(MAIN_CONTROL_REG, 1,
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SOFTWARE_SWITCH_OFF_ENABLED);
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}
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int stpmu1_regulator_enable(const char *name)
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int stpmic1_regulator_enable(const char *name)
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{
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const struct regul_struct *regul = stpmu1_get_regulator_data(name);
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const struct regul_struct *regul = get_regulator_data(name);
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return stpmu1_register_update(regul->control_reg, BIT(0), BIT(0));
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return stpmic1_register_update(regul->control_reg, BIT(0), BIT(0));
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}
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int stpmu1_regulator_disable(const char *name)
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int stpmic1_regulator_disable(const char *name)
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{
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const struct regul_struct *regul = stpmu1_get_regulator_data(name);
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const struct regul_struct *regul = get_regulator_data(name);
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return stpmu1_register_update(regul->control_reg, 0, BIT(0));
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return stpmic1_register_update(regul->control_reg, 0, BIT(0));
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}
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uint8_t stpmu1_is_regulator_enabled(const char *name)
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uint8_t stpmic1_is_regulator_enabled(const char *name)
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{
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uint8_t val;
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const struct regul_struct *regul = stpmu1_get_regulator_data(name);
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const struct regul_struct *regul = get_regulator_data(name);
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if (stpmu1_register_read(regul->control_reg, &val) != 0) {
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if (stpmic1_register_read(regul->control_reg, &val) != 0) {
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panic();
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}
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return (val & 0x1U);
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}
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int stpmu1_regulator_voltage_set(const char *name, uint16_t millivolts)
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int stpmic1_regulator_voltage_set(const char *name, uint16_t millivolts)
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{
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uint8_t voltage_index = stpmu1_voltage_find_index(name, millivolts);
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const struct regul_struct *regul = stpmu1_get_regulator_data(name);
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uint8_t voltage_index = voltage_to_index(name, millivolts);
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const struct regul_struct *regul = get_regulator_data(name);
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return stpmu1_register_update(regul->control_reg, voltage_index << 2,
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0xFC);
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return stpmic1_register_update(regul->control_reg, voltage_index << 2,
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0xFC);
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}
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int stpmu1_register_read(uint8_t register_id, uint8_t *value)
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int stpmic1_register_read(uint8_t register_id, uint8_t *value)
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{
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return stm32_i2c_mem_read(stpmu_i2c_handle, stpmu_i2c_addr,
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(uint16_t)register_id, I2C_MEMADD_SIZE_8BIT,
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value, 1, 100000);
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return stm32_i2c_mem_read(pmic_i2c_handle, pmic_i2c_addr,
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(uint16_t)register_id, I2C_MEMADD_SIZE_8BIT,
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value, 1, 100000);
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}
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int stpmu1_register_write(uint8_t register_id, uint8_t value)
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int stpmic1_register_write(uint8_t register_id, uint8_t value)
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{
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int status;
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status = stm32_i2c_mem_write(stpmu_i2c_handle, stpmu_i2c_addr,
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status = stm32_i2c_mem_write(pmic_i2c_handle, pmic_i2c_addr,
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(uint16_t)register_id,
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I2C_MEMADD_SIZE_8BIT, &value, 1, 100000);
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@ -561,7 +560,7 @@ int stpmu1_register_write(uint8_t register_id, uint8_t value)
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if ((register_id != WATCHDOG_CONTROL_REG) && (register_id <= 0x40U)) {
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uint8_t readval;
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status = stpmu1_register_read(register_id, &readval);
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status = stpmic1_register_read(register_id, &readval);
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if (status != 0) {
|
||||
return status;
|
||||
}
|
||||
|
|
@ -574,12 +573,12 @@ int stpmu1_register_write(uint8_t register_id, uint8_t value)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int stpmu1_register_update(uint8_t register_id, uint8_t value, uint8_t mask)
|
||||
int stpmic1_register_update(uint8_t register_id, uint8_t value, uint8_t mask)
|
||||
{
|
||||
int status;
|
||||
uint8_t val;
|
||||
|
||||
status = stpmu1_register_read(register_id, &val);
|
||||
status = stpmic1_register_read(register_id, &val);
|
||||
if (status != 0) {
|
||||
return status;
|
||||
}
|
||||
|
|
@ -591,11 +590,11 @@ int stpmu1_register_update(uint8_t register_id, uint8_t value, uint8_t mask)
|
|||
val |= (value & mask);
|
||||
|
||||
/* Send new value on I2C Bus */
|
||||
return stpmu1_register_write(register_id, val);
|
||||
return stpmic1_register_write(register_id, val);
|
||||
}
|
||||
|
||||
void stpmu1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr)
|
||||
void stpmic1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr)
|
||||
{
|
||||
stpmu_i2c_handle = i2c_handle;
|
||||
stpmu_i2c_addr = i2c_addr;
|
||||
pmic_i2c_handle = i2c_handle;
|
||||
pmic_i2c_addr = i2c_addr;
|
||||
}
|
||||
|
|
@ -26,8 +26,8 @@
|
|||
i2c-scl-falling-time-ns = <20>;
|
||||
status = "okay";
|
||||
|
||||
pmic: stpmu1@33 {
|
||||
compatible = "st,stpmu1";
|
||||
pmic: stpmic@33 {
|
||||
compatible = "st,stpmic1";
|
||||
reg = <0x33>;
|
||||
status = "okay";
|
||||
|
||||
|
|
@ -36,7 +36,7 @@
|
|||
st,usb_control_register = <0x30>;
|
||||
|
||||
regulators {
|
||||
compatible = "st,stpmu1-regulators";
|
||||
compatible = "st,stpmic1-regulators";
|
||||
|
||||
v3v3: buck4 {
|
||||
regulator-name = "v3v3";
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
/*
|
||||
* Copyright (c) 2017-2018, STMicroelectronics - All Rights Reserved
|
||||
* Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef STM32MP1_PMIC_H
|
||||
#define STM32MP1_PMIC_H
|
||||
#ifndef STM32MP_PMIC_H
|
||||
#define STM32MP_PMIC_H
|
||||
|
||||
#include <stdbool.h>
|
||||
|
||||
|
|
@ -17,4 +17,4 @@ void initialize_pmic_i2c(void);
|
|||
void initialize_pmic(void);
|
||||
int pmic_ddr_power_init(enum ddr_type ddr_type);
|
||||
|
||||
#endif /* STM32MP1_PMIC_H */
|
||||
#endif /* STM32MP_PMIC_H */
|
||||
|
|
@ -1,11 +1,11 @@
|
|||
/*
|
||||
* Copyright (c) 2016-2018, STMicroelectronics - All Rights Reserved
|
||||
* Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef STPMU1_H
|
||||
#define STPMU1_H
|
||||
#ifndef STPMIC1_H
|
||||
#define STPMIC1_H
|
||||
|
||||
#include <drivers/st/stm32_i2c.h>
|
||||
#include <lib/utils_def.h>
|
||||
|
|
@ -127,14 +127,14 @@
|
|||
#define SWIN_SWOUT_ENABLED BIT(2)
|
||||
#define USBSW_OTG_SWITCH_ENABLED BIT(1)
|
||||
|
||||
int stpmu1_switch_off(void);
|
||||
int stpmu1_register_read(uint8_t register_id, uint8_t *value);
|
||||
int stpmu1_register_write(uint8_t register_id, uint8_t value);
|
||||
int stpmu1_register_update(uint8_t register_id, uint8_t value, uint8_t mask);
|
||||
int stpmu1_regulator_enable(const char *name);
|
||||
int stpmu1_regulator_disable(const char *name);
|
||||
uint8_t stpmu1_is_regulator_enabled(const char *name);
|
||||
int stpmu1_regulator_voltage_set(const char *name, uint16_t millivolts);
|
||||
void stpmu1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr);
|
||||
int stpmic1_switch_off(void);
|
||||
int stpmic1_register_read(uint8_t register_id, uint8_t *value);
|
||||
int stpmic1_register_write(uint8_t register_id, uint8_t value);
|
||||
int stpmic1_register_update(uint8_t register_id, uint8_t value, uint8_t mask);
|
||||
int stpmic1_regulator_enable(const char *name);
|
||||
int stpmic1_regulator_disable(const char *name);
|
||||
uint8_t stpmic1_is_regulator_enabled(const char *name);
|
||||
int stpmic1_regulator_voltage_set(const char *name, uint16_t millivolts);
|
||||
void stpmic1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr);
|
||||
|
||||
#endif /* STPMU1_H */
|
||||
#endif /* STPMIC1_H */
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
|
@ -16,8 +16,8 @@
|
|||
#include <drivers/delay_timer.h>
|
||||
#include <drivers/generic_delay_timer.h>
|
||||
#include <drivers/st/stm32_console.h>
|
||||
#include <drivers/st/stm32mp_pmic.h>
|
||||
#include <drivers/st/stm32mp1_clk.h>
|
||||
#include <drivers/st/stm32mp1_pmic.h>
|
||||
#include <drivers/st/stm32mp1_pwr.h>
|
||||
#include <drivers/st/stm32mp1_ram.h>
|
||||
#include <drivers/st/stm32mp1_rcc.h>
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
#
|
||||
# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
|
||||
# Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-3-Clause
|
||||
#
|
||||
|
|
@ -52,8 +52,8 @@ PLAT_BL_COMMON_SOURCES += ${LIBFDT_SRCS} \
|
|||
drivers/st/ddr/stm32mp1_ddr_helpers.c \
|
||||
drivers/st/gpio/stm32_gpio.c \
|
||||
drivers/st/i2c/stm32_i2c.c \
|
||||
drivers/st/pmic/stm32mp1_pmic.c \
|
||||
drivers/st/pmic/stpmu1.c \
|
||||
drivers/st/pmic/stm32mp_pmic.c \
|
||||
drivers/st/pmic/stpmic1.c \
|
||||
drivers/st/reset/stm32mp1_reset.c \
|
||||
plat/st/stm32mp1/stm32mp1_context.c \
|
||||
plat/st/stm32mp1/stm32mp1_dt.c \
|
||||
|
|
|
|||
Loading…
Reference in New Issue