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fix(gpt_rme): use correct print format for uint64_t 

sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I30472411467061d58cc6ee22407ed3bad2552751
This commit is contained in:
Manish Pandey 2021-11-09 20:49:56 +00:00
parent a706524417
commit 2461bd3a89
2 changed files with 12 additions and 9 deletions
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13
lib/gpt_rme/gpt_rme.c
View File

@ -6,6 +6,7 @@
#include <assert.h>
#include <errno.h>
#include <inttypes.h>
#include <limits.h>
#include <stdint.h>
@ -445,7 +446,7 @@ static void gpt_generate_l0_blk_desc(pas_region_t *pas)
/* Generate the needed block descriptors. */
for (; idx < end_idx; idx++) {
l0_gpt_arr[idx] = gpt_desc;
VERBOSE("[GPT] L0 entry (BLOCK) index %u [%p]: GPI = 0x%llx (0x%llx)\n",
VERBOSE("[GPT] L0 entry (BLOCK) index %u [%p]: GPI = 0x%" PRIx64 " (0x%" PRIx64 ")\n",
idx, &l0_gpt_arr[idx],
(gpt_desc >> GPT_L0_BLK_DESC_GPI_SHIFT) &
GPT_L0_BLK_DESC_GPI_MASK, l0_gpt_arr[idx]);
@ -606,7 +607,7 @@ static void gpt_generate_l0_tbl_desc(pas_region_t *pas)
l0_gpt_base[l0_idx] = GPT_L0_TBL_DESC(l1_gpt_arr);
}
VERBOSE("[GPT] L0 entry (TABLE) index %u [%p] ==> L1 Addr 0x%llx (0x%llx)\n",
VERBOSE("[GPT] L0 entry (TABLE) index %u [%p] ==> L1 Addr 0x%llx (0x%" PRIx64 ")\n",
l0_idx, &l0_gpt_base[l0_idx],
(unsigned long long)(l1_gpt_arr),
l0_gpt_base[l0_idx]);
@ -1042,7 +1043,7 @@ int gpt_transition_pas(uint64_t base, size_t size, unsigned int src_sec_state,
/* Check for address range overflow. */
if ((ULONG_MAX - base) < size) {
VERBOSE("[GPT] Transition request address overflow!\n");
VERBOSE(" Base=0x%llx\n", base);
VERBOSE(" Base=0x%" PRIx64 "\n", base);
VERBOSE(" Size=0x%lx\n", size);
return -EINVAL;
}
@ -1053,7 +1054,7 @@ int gpt_transition_pas(uint64_t base, size_t size, unsigned int src_sec_state,
(size == 0U) ||
((base + size) >= GPT_PPS_ACTUAL_SIZE(gpt_config.t))) {
VERBOSE("[GPT] Invalid granule transition address range!\n");
VERBOSE(" Base=0x%llx\n", base);
VERBOSE(" Base=0x%" PRIx64 "\n", base);
VERBOSE(" Size=0x%lx\n", size);
return -EINVAL;
}
@ -1072,7 +1073,7 @@ int gpt_transition_pas(uint64_t base, size_t size, unsigned int src_sec_state,
gpt_l0_desc = gpt_l0_base[GPT_L0_IDX(base)];
if (GPT_L0_TYPE(gpt_l0_desc) != GPT_L0_TYPE_TBL_DESC) {
VERBOSE("[GPT] Granule is not covered by a table descriptor!\n");
VERBOSE(" Base=0x%llx\n", base);
VERBOSE(" Base=0x%" PRIx64 "\n", base);
return -EINVAL;
}
@ -1116,7 +1117,7 @@ int gpt_transition_pas(uint64_t base, size_t size, unsigned int src_sec_state,
* The isb() will be done as part of context
* synchronization when returning to lower EL
*/
VERBOSE("[GPT] Granule 0x%llx, GPI 0x%x->0x%x\n", base, gpi,
VERBOSE("[GPT] Granule 0x%" PRIx64 ", GPI 0x%x->0x%x\n", base, gpi,
target_pas);
return 0;

8
services/std_svc/rmmd/rmmd_main.c
View File

@ -6,6 +6,8 @@
#include <assert.h>
#include <errno.h>
#include <inttypes.h>
#include <stdint.h>
#include <string.h>
#include <arch_helpers.h>
@ -131,7 +133,7 @@ static int32_t rmm_init(void)
rc = rmmd_rmm_sync_entry(ctx);
if (rc != 0ULL) {
ERROR("RMM initialisation failed 0x%llx\n", rc);
ERROR("RMM initialisation failed 0x%" PRIx64 "\n", rc);
panic();
}
@ -301,12 +303,12 @@ static int gtsi_transition_granule(uint64_t pa,
/* Convert TF-A error codes into GTSI error codes */
if (ret == -EINVAL) {
ERROR("[GTSI] Transition failed: invalid %s\n", "address");
ERROR(" PA: 0x%llx, SRC: %d, PAS: %d\n", pa,
ERROR(" PA: 0x%" PRIx64 ", SRC: %d, PAS: %d\n", pa,
src_sec_state, target_pas);
ret = GRAN_TRANS_RET_BAD_ADDR;
} else if (ret == -EPERM) {
ERROR("[GTSI] Transition failed: invalid %s\n", "caller/PAS");
ERROR(" PA: 0x%llx, SRC: %d, PAS: %d\n", pa,
ERROR(" PA: 0x%" PRIx64 ", SRC: %d, PAS: %d\n", pa,
src_sec_state, target_pas);
ret = GRAN_TRANS_RET_BAD_PAS;
}