fix(gpt_rme): use correct print format for uint64_t
sha 4ce3e99a3
introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I30472411467061d58cc6ee22407ed3bad2552751
This commit is contained in:
parent
a706524417
commit
2461bd3a89
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@ -6,6 +6,7 @@
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#include <assert.h>
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#include <assert.h>
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#include <errno.h>
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#include <errno.h>
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#include <inttypes.h>
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#include <limits.h>
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#include <limits.h>
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#include <stdint.h>
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#include <stdint.h>
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@ -445,7 +446,7 @@ static void gpt_generate_l0_blk_desc(pas_region_t *pas)
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/* Generate the needed block descriptors. */
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/* Generate the needed block descriptors. */
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for (; idx < end_idx; idx++) {
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for (; idx < end_idx; idx++) {
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l0_gpt_arr[idx] = gpt_desc;
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l0_gpt_arr[idx] = gpt_desc;
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VERBOSE("[GPT] L0 entry (BLOCK) index %u [%p]: GPI = 0x%llx (0x%llx)\n",
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VERBOSE("[GPT] L0 entry (BLOCK) index %u [%p]: GPI = 0x%" PRIx64 " (0x%" PRIx64 ")\n",
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idx, &l0_gpt_arr[idx],
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idx, &l0_gpt_arr[idx],
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(gpt_desc >> GPT_L0_BLK_DESC_GPI_SHIFT) &
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(gpt_desc >> GPT_L0_BLK_DESC_GPI_SHIFT) &
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GPT_L0_BLK_DESC_GPI_MASK, l0_gpt_arr[idx]);
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GPT_L0_BLK_DESC_GPI_MASK, l0_gpt_arr[idx]);
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@ -606,7 +607,7 @@ static void gpt_generate_l0_tbl_desc(pas_region_t *pas)
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l0_gpt_base[l0_idx] = GPT_L0_TBL_DESC(l1_gpt_arr);
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l0_gpt_base[l0_idx] = GPT_L0_TBL_DESC(l1_gpt_arr);
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}
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}
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VERBOSE("[GPT] L0 entry (TABLE) index %u [%p] ==> L1 Addr 0x%llx (0x%llx)\n",
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VERBOSE("[GPT] L0 entry (TABLE) index %u [%p] ==> L1 Addr 0x%llx (0x%" PRIx64 ")\n",
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l0_idx, &l0_gpt_base[l0_idx],
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l0_idx, &l0_gpt_base[l0_idx],
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(unsigned long long)(l1_gpt_arr),
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(unsigned long long)(l1_gpt_arr),
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l0_gpt_base[l0_idx]);
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l0_gpt_base[l0_idx]);
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@ -1042,7 +1043,7 @@ int gpt_transition_pas(uint64_t base, size_t size, unsigned int src_sec_state,
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/* Check for address range overflow. */
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/* Check for address range overflow. */
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if ((ULONG_MAX - base) < size) {
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if ((ULONG_MAX - base) < size) {
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VERBOSE("[GPT] Transition request address overflow!\n");
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VERBOSE("[GPT] Transition request address overflow!\n");
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VERBOSE(" Base=0x%llx\n", base);
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VERBOSE(" Base=0x%" PRIx64 "\n", base);
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VERBOSE(" Size=0x%lx\n", size);
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VERBOSE(" Size=0x%lx\n", size);
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -1053,7 +1054,7 @@ int gpt_transition_pas(uint64_t base, size_t size, unsigned int src_sec_state,
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(size == 0U) ||
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(size == 0U) ||
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((base + size) >= GPT_PPS_ACTUAL_SIZE(gpt_config.t))) {
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((base + size) >= GPT_PPS_ACTUAL_SIZE(gpt_config.t))) {
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VERBOSE("[GPT] Invalid granule transition address range!\n");
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VERBOSE("[GPT] Invalid granule transition address range!\n");
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VERBOSE(" Base=0x%llx\n", base);
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VERBOSE(" Base=0x%" PRIx64 "\n", base);
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VERBOSE(" Size=0x%lx\n", size);
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VERBOSE(" Size=0x%lx\n", size);
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -1072,7 +1073,7 @@ int gpt_transition_pas(uint64_t base, size_t size, unsigned int src_sec_state,
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gpt_l0_desc = gpt_l0_base[GPT_L0_IDX(base)];
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gpt_l0_desc = gpt_l0_base[GPT_L0_IDX(base)];
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if (GPT_L0_TYPE(gpt_l0_desc) != GPT_L0_TYPE_TBL_DESC) {
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if (GPT_L0_TYPE(gpt_l0_desc) != GPT_L0_TYPE_TBL_DESC) {
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VERBOSE("[GPT] Granule is not covered by a table descriptor!\n");
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VERBOSE("[GPT] Granule is not covered by a table descriptor!\n");
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VERBOSE(" Base=0x%llx\n", base);
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VERBOSE(" Base=0x%" PRIx64 "\n", base);
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -1116,7 +1117,7 @@ int gpt_transition_pas(uint64_t base, size_t size, unsigned int src_sec_state,
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* The isb() will be done as part of context
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* The isb() will be done as part of context
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* synchronization when returning to lower EL
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* synchronization when returning to lower EL
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*/
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*/
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VERBOSE("[GPT] Granule 0x%llx, GPI 0x%x->0x%x\n", base, gpi,
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VERBOSE("[GPT] Granule 0x%" PRIx64 ", GPI 0x%x->0x%x\n", base, gpi,
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target_pas);
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target_pas);
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return 0;
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return 0;
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@ -6,6 +6,8 @@
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#include <assert.h>
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#include <assert.h>
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#include <errno.h>
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#include <errno.h>
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#include <inttypes.h>
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#include <stdint.h>
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#include <string.h>
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#include <string.h>
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#include <arch_helpers.h>
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#include <arch_helpers.h>
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@ -131,7 +133,7 @@ static int32_t rmm_init(void)
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rc = rmmd_rmm_sync_entry(ctx);
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rc = rmmd_rmm_sync_entry(ctx);
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if (rc != 0ULL) {
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if (rc != 0ULL) {
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ERROR("RMM initialisation failed 0x%llx\n", rc);
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ERROR("RMM initialisation failed 0x%" PRIx64 "\n", rc);
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panic();
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panic();
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}
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}
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@ -301,12 +303,12 @@ static int gtsi_transition_granule(uint64_t pa,
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/* Convert TF-A error codes into GTSI error codes */
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/* Convert TF-A error codes into GTSI error codes */
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if (ret == -EINVAL) {
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if (ret == -EINVAL) {
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ERROR("[GTSI] Transition failed: invalid %s\n", "address");
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ERROR("[GTSI] Transition failed: invalid %s\n", "address");
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ERROR(" PA: 0x%llx, SRC: %d, PAS: %d\n", pa,
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ERROR(" PA: 0x%" PRIx64 ", SRC: %d, PAS: %d\n", pa,
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src_sec_state, target_pas);
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src_sec_state, target_pas);
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ret = GRAN_TRANS_RET_BAD_ADDR;
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ret = GRAN_TRANS_RET_BAD_ADDR;
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} else if (ret == -EPERM) {
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} else if (ret == -EPERM) {
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ERROR("[GTSI] Transition failed: invalid %s\n", "caller/PAS");
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ERROR("[GTSI] Transition failed: invalid %s\n", "caller/PAS");
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ERROR(" PA: 0x%llx, SRC: %d, PAS: %d\n", pa,
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ERROR(" PA: 0x%" PRIx64 ", SRC: %d, PAS: %d\n", pa,
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src_sec_state, target_pas);
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src_sec_state, target_pas);
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ret = GRAN_TRANS_RET_BAD_PAS;
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ret = GRAN_TRANS_RET_BAD_PAS;
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}
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}
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