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Tegra186: sanity check power state type 

This patch sanity checks the power state type before use,
from the platform's PSCI handler.

Verified with TFTF Standard Test Suite.

Change-Id: Icd45faac6c023d4ce7f3597b698d01b91a218124
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
This commit is contained in:
Varun Wadekar 2020-07-23 10:31:42 -07:00
parent 923c221b6d
commit 26c22a5e33
1 changed files with 5 additions and 0 deletions
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5
plat/nvidia/tegra/soc/t186/plat_psci_handlers.c
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@ -72,6 +72,11 @@ int32_t tegra_soc_validate_power_state(uint32_t power_state,
case PSTATE_ID_CORE_IDLE:
case PSTATE_ID_CORE_POWERDN:
if (psci_get_pstate_type(power_state) != PSTATE_TYPE_POWERDOWN) {
ret = PSCI_E_INVALID_PARAMS;
break;
}
/* Core powerdown request */
req_state->pwr_domain_state[MPIDR_AFFLVL0] = state_id;
req_state->pwr_domain_state[MPIDR_AFFLVL1] = state_id;