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marvell: drivers: move XOR0/1 DIOB from WIN 0 to 1 

Change CP110 XOR (DMA) to use WIN1 which is used for PCI-EP address
space only and using this window bypasses the need for translation
in the SMMU which has performance impact.

Change-Id: I98d99da59e904e6721cfa263ce44ad178a0fa956
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-on: https://sj1git1.cavium.com/20389
Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
This commit is contained in:
Ofer Heifetz 2019-12-16 12:25:28 +02:00 committed by Konstantin Porotchkin
parent 2bcde264f3
commit 27528f7201
1 changed files with 15 additions and 0 deletions
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15
drivers/marvell/iob.c
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@ -44,6 +44,10 @@
#define IOB_WIN_ALR_OFFSET(win) (iob_base + 0x8 + (0x20 * win))
#define IOB_WIN_AHR_OFFSET(win) (iob_base + 0xC + (0x20 * win))
#define IOB_WIN_DIOB_CR_OFFSET(win) (iob_base + 0x10 + (0x20 * win))
#define IOB_WIN_XOR0_DIOB_EN BIT(0)
#define IOB_WIN_XOR1_DIOB_EN BIT(1)
uintptr_t iob_base;
static void iob_win_check(struct addr_map_win *win, uint32_t win_num)
@ -71,6 +75,17 @@ static void iob_enable_win(struct addr_map_win *win, uint32_t win_id)
uint32_t iob_win_reg;
uint32_t alr, ahr;
uint64_t end_addr;
uint32_t reg_en;
/* move XOR (DMA) to use WIN1 which is used for PCI-EP address space */
reg_en = IOB_WIN_XOR0_DIOB_EN | IOB_WIN_XOR1_DIOB_EN;
iob_win_reg = mmio_read_32(IOB_WIN_DIOB_CR_OFFSET(0));
iob_win_reg &= ~reg_en;
mmio_write_32(IOB_WIN_DIOB_CR_OFFSET(0), iob_win_reg);
iob_win_reg = mmio_read_32(IOB_WIN_DIOB_CR_OFFSET(1));
iob_win_reg |= reg_en;
mmio_write_32(IOB_WIN_DIOB_CR_OFFSET(1), iob_win_reg);
end_addr = (win->base_addr + win->win_size - 1);
alr = (uint32_t)((win->base_addr >> ADDRESS_SHIFT) & ADDRESS_MASK);