From 12e7c4ab0bbc9d9d4e950bdbda5a86f61c13bc1a Mon Sep 17 00:00:00 2001 From: Vikram Kanigiri Date: Thu, 29 Jan 2015 18:27:38 +0000 Subject: [PATCH] Initialise cpu ops after enabling data cache The cpu-ops pointer was initialized before enabling the data cache in the cold and warm boot paths. This required a DCIVAC cache maintenance operation to invalidate any stale cache lines resident in other cpus. This patch moves this initialization to the bl31_arch_setup() function which is always called after the data cache and MMU has been enabled. This change removes the need: 1. for the DCIVAC cache maintenance operation. 2. to initialise the CPU ops upon resumption from a PSCI CPU_SUSPEND call since memory contents are always preserved in this case. Change-Id: Ibb2fa2f7460d1a1f1e721242025e382734c204c6 --- bl31/aarch64/bl31_arch_setup.c | 4 ++++ bl31/aarch64/bl31_entrypoint.S | 6 ------ include/bl31/cpu_data.h | 1 + lib/cpus/aarch64/cpu_helpers.S | 15 ++------------- services/std_svc/psci/psci_entry.S | 6 ------ 5 files changed, 7 insertions(+), 25 deletions(-) diff --git a/bl31/aarch64/bl31_arch_setup.c b/bl31/aarch64/bl31_arch_setup.c index a88b029ea..edf10188d 100644 --- a/bl31/aarch64/bl31_arch_setup.c +++ b/bl31/aarch64/bl31_arch_setup.c @@ -33,6 +33,7 @@ #include #include #include +#include #include /******************************************************************************* @@ -47,4 +48,7 @@ void bl31_arch_setup(void) /* Program the counter frequency */ write_cntfrq_el0(plat_get_syscnt_freq()); + + /* Initialize the cpu_ops pointer. */ + init_cpu_ops(); } diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S index 01d7a7f53..186b1cbc2 100644 --- a/bl31/aarch64/bl31_entrypoint.S +++ b/bl31/aarch64/bl31_entrypoint.S @@ -161,12 +161,6 @@ func bl31_entrypoint bl zeromem16 #endif - /* --------------------------------------------- - * Initialize the cpu_ops pointer. - * --------------------------------------------- - */ - bl init_cpu_ops - /* --------------------------------------------- * Use SP_EL0 for the C runtime stack. * --------------------------------------------- diff --git a/include/bl31/cpu_data.h b/include/bl31/cpu_data.h index 1926e292a..50f509bbd 100644 --- a/include/bl31/cpu_data.h +++ b/include/bl31/cpu_data.h @@ -117,6 +117,7 @@ static inline struct cpu_data *_cpu_data(void) *************************************************************************/ void init_cpu_data_ptr(void); +void init_cpu_ops(void); #define get_cpu_data(_m) _cpu_data()->_m #define set_cpu_data(_m, _v) _cpu_data()->_m = _v diff --git a/lib/cpus/aarch64/cpu_helpers.S b/lib/cpus/aarch64/cpu_helpers.S index bebe7c0a5..24c283ab0 100644 --- a/lib/cpus/aarch64/cpu_helpers.S +++ b/lib/cpus/aarch64/cpu_helpers.S @@ -110,7 +110,8 @@ func prepare_cluster_pwr_dwn /* * Initializes the cpu_ops_ptr if not already initialized - * in cpu_data. This can be called without a runtime stack. + * in cpu_data. This can be called without a runtime stack, but may + * only be called after the MMU is enabled. * clobbers: x0 - x6, x10 */ .globl init_cpu_ops @@ -125,18 +126,6 @@ func init_cpu_ops ASM_ASSERT(ne) #endif str x0, [x6, #CPU_DATA_CPU_OPS_PTR]! - - /* - * Make sure that any pre-fetched cache copies are invalidated. - * Ensure that we are running with cache disable else we - * invalidate our own update. - */ -#if ASM_ASSERTION - mrs x1, sctlr_el3 - tst x1, #SCTLR_C_BIT - ASM_ASSERT(eq) -#endif - dc ivac, x6 mov x30, x10 1: ret diff --git a/services/std_svc/psci/psci_entry.S b/services/std_svc/psci/psci_entry.S index 3e67d3449..fb3f00761 100644 --- a/services/std_svc/psci/psci_entry.S +++ b/services/std_svc/psci/psci_entry.S @@ -86,12 +86,6 @@ psci_aff_common_finish_entry: */ bl init_cpu_data_ptr - /* --------------------------------------------- - * Initialize the cpu_ops pointer. - * --------------------------------------------- - */ - bl init_cpu_ops - /* --------------------------------------------- * Set the exception vectors * ---------------------------------------------