From 2ad1bddca9272d622696d882c9439aaa06e359ff Mon Sep 17 00:00:00 2001 From: Varun Wadekar Date: Wed, 8 Nov 2017 14:03:16 -0800 Subject: [PATCH] Tegra: smmu: change exit criteria for context size calculation Tegra SoCs currently do not have a SMMU register at address 0xFFFFFFFF. This patch changes the search criteria, to look for this marker, to calculate the size of the saved context. Change-Id: I15d91945ecb78267f91c45f37985dbb2327ca3ae Signed-off-by: Varun Wadekar --- plat/nvidia/tegra/common/drivers/smmu/smmu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/plat/nvidia/tegra/common/drivers/smmu/smmu.c b/plat/nvidia/tegra/common/drivers/smmu/smmu.c index 333d7d163..8c1b899f7 100644 --- a/plat/nvidia/tegra/common/drivers/smmu/smmu.c +++ b/plat/nvidia/tegra/common/drivers/smmu/smmu.c @@ -101,12 +101,13 @@ void tegra_smmu_save_context(uint64_t smmu_ctx_addr) * the last entry. Sanity check the table size before we start with * the context save operation. */ - while (smmu_ctx_regs[num_entries].val != 0xFFFFFFFFU) { + while ((smmu_ctx_regs[num_entries].reg != 0xFFFFFFFFU)) { num_entries++; } /* panic if the sizes do not match */ if (num_entries != smmu_ctx_regs[0].val) { + ERROR("SMMU context size mismatch!"); panic(); }