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CSS: Put secondary CPUs in a pen when booting an EL3 payload 

By default, only the primary CPU is powered on by SCP on CSS
platforms. Secondary CPUs are then powered on later using PSCI
calls.

However, it is possible to power on more than one CPU at boot time
using platform specific settings. In this case, several CPUs will
enter the Trusted Firmware and execute the cold boot path code.
This is currently not supported and secondary CPUs will panic.

This patch preserves this behaviour in the normal boot flow.
However, when booting an EL3 payload, secondary CPUs are now held in
a pen until their mailbox is populated, at which point they jump to
this address. Note that, since all CPUs share the same mailbox, they
will all be released from their holding pen at the same time and the
EL3 payload is responsible to arbitrate execution between CPUs if
required.

Change-Id: I83737e0c9f15ca5e73afbed2e9c761bc580735b9
This commit is contained in:
Sandrine Bailleux 2015-04-29 16:28:52 +01:00 committed by Achin Gupta
parent 4c117f6c49
commit 2bc420676c
1 changed files with 25 additions and 8 deletions
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33
plat/arm/css/common/aarch64/css_helpers.S
View File

@ -37,19 +37,36 @@
.globl css_calc_core_pos_swap_cluster
.weak plat_is_my_cpu_primary
/* -----------------------------------------------------
* void plat_secondary_cold_boot_setup (void);
/* ---------------------------------------------------------------------
* void plat_secondary_cold_boot_setup(void);
*
* This function performs any platform specific actions
* needed for a secondary cpu after a cold reset e.g
* mark the cpu's presence, mechanism to place it in a
* holding pen etc.
* -----------------------------------------------------
* In the normal boot flow, cold-booting secondary CPUs is not yet
* implemented and they panic.
*
* When booting an EL3 payload, secondary CPUs are placed in a holding
* pen, waiting for their mailbox to be populated. Note that all CPUs
* share the same mailbox ; therefore, populating it will release all
* CPUs from their holding pen. If finer-grained control is needed then
* this should be handled in the code that secondary CPUs jump to.
* ---------------------------------------------------------------------
*/
func plat_secondary_cold_boot_setup
/* todo: Implement secondary CPU cold boot setup on CSS platforms */
#ifndef EL3_PAYLOAD_BASE
/* TODO: Implement secondary CPU cold boot setup on CSS platforms */
cb_panic:
b cb_panic
#else
mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE
/* Wait until the mailbox gets populated */
poll_mailbox:
ldr x1, [x0]
cbz x1, 1f
br x1
1:
wfe
b poll_mailbox
#endif /* EL3_PAYLOAD_BASE */
endfunc plat_secondary_cold_boot_setup
/* ---------------------------------------------------------------------